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{"sheet":"Cover_sheet","index":0,"n_rows":36,"n_cols":4,"rows_kept":36,"cut":false,"hidden":false,"merged":[]}
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["Document ID: "]
["      FS84_QFN48EP_OTP_Config"]
[]
["Document Description:"]
["      Select OTP configuration"]
[]
["Related Data Sheet: "]
["     A0 silicon, FS84_QFN48EP datasheet rev 0.1 and after"]
[]
["Related GUI: "]
["     A0 silicon, FS84_QFN48EP GUI rev 1.0 and after"]
[]
["Revision History:",null,"1.3"]
[]
[null,"Revision","Date","Description of changes"]
[null,"1.0","Jun-20"," Version for production release"]
[null,1.1000000000000001,"Jul-20","Corrected automatic fill in main_reg on Vpre"]
[null,1.2,"Mar-21","Corected Power Sequencing Figure"]
[null,1.3,"April-21","Device family and other feature added"]
[null,1.4,"Nov-21","Updated Macro bug related to Adobe"]
[]
[]
[null,"1/ Fill in OTP_conf_main_reg sheet with available drop down list configuration for each OTP bit. Read the comments in OTP_conf_main_bits sheet for help"]
[null,"2/ Fill in OTP_conf_failsafe_reg sheet with available drop down list configuration for each OTP bit.  Read the comments in OTP_conf_failsafe_bits sheet for help"]
[null,"3/ Verify the complete OTP configuration in OTP_conf_summary sheet"]
[null,"4/ When the OTP configuration is OK, generate the text file that will be used with the EVB GUI"]
[null,"   - From OTP_conf_file_generation sheet"]
[null,"   - Fill in cells G3 to G10."]
["Quick User Guide:","   - Click on Write_OTP_File_GUI button to generate the text file at the location entered in G7 cell"]
[null,"5/ The text file will be used with the EVB GUI. Refer to the GUI user guide."]

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[]
[null,null,null,null,null,null,null,null,null,"Filename:",{"$f":"\"R_\" & N5 & \"_rev_\" & LEFT(OTP_conf_file_generation!G13,1)","v":"R_PFS8416AMBGJES_rev_B"}]
[]
[]
[null,null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"OTP_conf_file_generation!G4","v":"PFS8416AMBGJES"}]
[null,null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"\"Configuration report for \" & LEFT(OTP_conf_file_generation!G3,6) & \" OTP program ID: \" & LEFT(UPPER(OTP_conf_file_generation!G12),2) & \" rev \" & LEFT(OTP_conf_file_generation!G13,1)","v":"Configuration report for FS8416 OTP program ID: GJ rev B"}]
[null,null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"TODAY()","v":"2021-11-22"}]
[]
[]
[]
[]
[" 1    General description"]
[]
[]
[" 2    Features and benefits"]
[]
[]
[]
[]
[]
[]
[]
[]
[" 3    Applications"]
[]
[]
[" 4    Ordering information"]
[null,"Table 1. Ordering Information"]
[null,"Type number[1]",null,"Package",null,null,null,null,null,null,null,null,null,{"$f":"OTP_conf_file_generation!G4","v":"PFS8416AMBGJES"}]
[null,null,null,"Name",null,"Description",null,null,null,"Version",null,null,null,{"$f":"OTP_conf_file_generation!G5","v":0}]
[null,{"$f":"OTP_conf_file_generation!G4","v":"PFS8416AMBGJES"},null,"QFN48EP",null,"FS84 QFN48EP package is a QFN (sawn), thermally enhanced wettable flanks, 7 x 7 x\n0.85 mm, 0.5 mm pitch, 48 pins.",null,null,null,"SOT619-27(D)"]
[null,"[1] To order parts in tape and reel, add the R2 suffix to the part number."]
[]
[]
[" 5    Power up sequence summary"]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[null,"Note: VBOS is set at 5.1 V and RSTB at 3.2 V or 4.9 V to differentiate from regulators on the graph"]
[]
[null,null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"\"R_\" & OTP_conf_file_generation!G4","v":"R_PFS8416AMBGJES"}]
[]
[]
[]
[]
[]
[]
[" 6    Hardware configuration diagram"]
[]
[]
[null,null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"IF(RIGHT(H135,1)=\")\",\"SPI\",RIGHT(H135,1))","v":"3"}]
[]
[null,null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"IF(RIGHT(H146,1)=\")\",\"SPI\",RIGHT(H146,1))","v":"0"}]
[null,null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"IF(RIGHT(H169,1)=\")\",\"SPI\",RIGHT(H169,1))","v":"2"}]
[null,null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"IF(RIGHT(H173,1)=\")\",\"SPI\",RIGHT(H173,1))","v":"0"}]
[]
[]
[null,null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"IF(H119=\"Yes\",H120,\"Disabled\")","v":" 5.00V"}]
[]
[null,null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"IF(H137=\"Yes\",H138,\"Disabled\")","v":" 2.3V"}]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[" 7    OTP configuration"]
[]
[null,"Table 2. Main OTP configuration"]
[null,"Functional block",null,"Feature",null,null,null,"OTP selection"]
[null,"VPRE",null,"Output voltage",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!G5,LEN(OTP_conf_main_reg!G5)-FIND(\"-\",OTP_conf_main_reg!G5,1))","v":" 3.3V"}]
[null,null,null,"Slope compensation",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!G7,LEN(OTP_conf_main_reg!G7)-FIND(\"-\",OTP_conf_main_reg!G7,1))","v":" 50mV/µs"}]
[null,null,null,"Current limitation",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!E9,LEN(OTP_conf_main_reg!E9)-FIND(\"-\",OTP_conf_main_reg!E9,1))","v":" 150mV"}]
[null,null,null,"High Side slew rate",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!K9,LEN(OTP_conf_main_reg!K9)-FIND(\"-\",OTP_conf_main_reg!K9,1))","v":" PU/PD/900mA"}]
[null,null,null,"Low Side slew rate",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!I9,LEN(OTP_conf_main_reg!I9)-FIND(\"-\",OTP_conf_main_reg!I9,1))","v":" PU/PD/900mA"}]
[null,null,null,"Switching frequency",null,null,null,{"$f":"IF(OTP_conf_main_reg!I43=\"1 - CLK2\",RIGHT(OTP_conf_main_reg!J37,LEN(OTP_conf_main_reg!J37)-FIND(\"=\",OTP_conf_main_reg!J37,1)),RIGHT(OTP_conf_main_reg!K43,LEN(OTP_conf_main_reg!K43)-FIND(\"=\",OTP_conf_main_reg!K43,1)))","v":"455KHz"}]
[null,null,null,"Phase shifting",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!G37,LEN(OTP_conf_main_reg!G37)-FIND(\"-\",OTP_conf_main_reg!G37,1))","v":" delay 0"}]
[null,null,null,"Turn OFF delay",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!H47,LEN(OTP_conf_main_reg!H47)-FIND(\"-\",OTP_conf_main_reg!H47,1))","v":" 250µs"}]
[null,null,null,"VPRE mode",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!G11,LEN(OTP_conf_main_reg!G11)-FIND(\"-\",OTP_conf_main_reg!G11,1))","v":" Force PWM"}]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[null,"Table 2. Main OTP configuration (continued)"]
[null,"Functional block",null,"Feature",null,null,null,"OTP selection"]
[null,"VBOOST",null,"Enabled",null,null,null,{"$f":"IF(RIGHT(OTP_conf_main_reg!E13,LEN(OTP_conf_main_reg!E13)-FIND(\"-\",OTP_conf_main_reg!E13,1))=\" enabled\", \"Yes\",\"No\")","v":"Yes"}]
[null,null,null,"Output voltage",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!I11,LEN(OTP_conf_main_reg!I11)-FIND(\"-\",OTP_conf_main_reg!I11,1))","v":" 5.00V"}]
[null,null,null,"Slope compensation",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!H13,LEN(OTP_conf_main_reg!H13)-FIND(\"-\",OTP_conf_main_reg!H13,1))","v":" 125mV/µs"}]
[null,null,null,"Slew rate",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!K15,LEN(OTP_conf_main_reg!K15)-FIND(\"-\",OTP_conf_main_reg!K15,1))","v":" 500V/µs"}]
[null,null,null,"Compensation resistor",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!E15,LEN(OTP_conf_main_reg!E15)-FIND(\"-\",OTP_conf_main_reg!E15,1))","v":" 750kohms"}]
[null,null,null,"Compensation capacitor",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!G15,LEN(OTP_conf_main_reg!G15)-FIND(\"-\",OTP_conf_main_reg!G15,1))","v":" 125pF"}]
[null,null,null,"Switching frequency",null,null,null,{"$f":"IF(OTP_conf_main_reg!H43=\"1 - CLK2\",RIGHT(OTP_conf_main_reg!J37,LEN(OTP_conf_main_reg!J37)-FIND(\"=\",OTP_conf_main_reg!J37,1)),RIGHT(OTP_conf_main_reg!K43,LEN(OTP_conf_main_reg!K43)-FIND(\"=\",OTP_conf_main_reg!K43,1)))","v":"2.22MHz"}]
[null,null,null,"Phase shifting",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!J39,LEN(OTP_conf_main_reg!J39)-FIND(\"-\",OTP_conf_main_reg!J39,1))","v":" delay 0"}]
[null,null,null,"Behavior in case of TSD",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!G45,LEN(OTP_conf_main_reg!G45)-FIND(\"-\",OTP_conf_main_reg!G45,1))","v":" BOOST Shutdown"}]
[null,"BUCK1",null,"Output voltage",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!E17,LEN(OTP_conf_main_reg!E17)-FIND(\"-\",OTP_conf_main_reg!E17,1))","v":" 0.825V"}]
[null,null,null,"Inductor",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!H19,LEN(OTP_conf_main_reg!H19)-FIND(\"-\",OTP_conf_main_reg!H19,1))","v":" 1µH"}]
[null,null,null,"Current limitation",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!J19,LEN(OTP_conf_main_reg!J19)-FIND(\"-\",OTP_conf_main_reg!J19,1))","v":" 4.5A"}]
[null,null,null,"Compensation network",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!H27,LEN(OTP_conf_main_reg!H27)-FIND(\"-\",OTP_conf_main_reg!H27,1))","v":" 65 GM"}]
[null,null,null,"Switching frequency",null,null,null,{"$f":"IF(OTP_conf_main_reg!G43=\"1 - CLK2\",RIGHT(OTP_conf_main_reg!J37,LEN(OTP_conf_main_reg!J37)-FIND(\"=\",OTP_conf_main_reg!J37,1)),RIGHT(OTP_conf_main_reg!K43,LEN(OTP_conf_main_reg!K43)-FIND(\"=\",OTP_conf_main_reg!K43,1)))","v":"2.22MHz"}]
[null,null,null,"Phase shifting",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!G39,LEN(OTP_conf_main_reg!G39)-FIND(\"-\",OTP_conf_main_reg!G39,1))","v":" delay 6"}]
[null,null,null,"Behavior in case of TSD",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!H45,LEN(OTP_conf_main_reg!H45)-FIND(\"-\",OTP_conf_main_reg!H45,1))","v":" BUCK1 Shutdown"}]
[null,null,null,"Power sequencing slot",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!J31,LEN(OTP_conf_main_reg!J31)-FIND(\"-\",OTP_conf_main_reg!J31,1))","v":" Regulator Start and Stop in Slot 3"}]
[null,null,null,"Soft start ramp",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!E35,LEN(OTP_conf_main_reg!E35)-FIND(\"-\",OTP_conf_main_reg!E35,1))","v":" 7.81mV/µs"}]
[null,"BUCK3",null,"Enabled",null,null,null,{"$f":"IF(RIGHT(OTP_conf_main_reg!E25,LEN(OTP_conf_main_reg!E25)-FIND(\"-\",OTP_conf_main_reg!E25,1))=\" enabled\", \"Yes\",\"No\")","v":"Yes"}]
[null,null,null,"Output voltage",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!H25,LEN(OTP_conf_main_reg!H25)-FIND(\"-\",OTP_conf_main_reg!H25,1))","v":" 2.3V"}]
[null,null,null,"Inductor",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!F25,LEN(OTP_conf_main_reg!F25)-FIND(\"-\",OTP_conf_main_reg!F25,1))","v":" 1µH"}]
[null,null,null,"Current limitation",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!K27,LEN(OTP_conf_main_reg!K27)-FIND(\"-\",OTP_conf_main_reg!K27,1))","v":" 4.5A"}]
[null,null,null,"Compensation resistor",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!K23,LEN(OTP_conf_main_reg!K23)-FIND(\"-\",OTP_conf_main_reg!K23,1))","v":" Default"}]
[null,null,null,"Gain control",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!L23,LEN(OTP_conf_main_reg!L23)-FIND(\"-\",OTP_conf_main_reg!L23,1))","v":" Default"}]
[null,null,null,"Switching frequency",null,null,null,{"$f":"IF(OTP_conf_main_reg!E43=\"1 - CLK2\",RIGHT(OTP_conf_main_reg!J37,LEN(OTP_conf_main_reg!J37)-FIND(\"=\",OTP_conf_main_reg!J37,1)),RIGHT(OTP_conf_main_reg!K43,LEN(OTP_conf_main_reg!K43)-FIND(\"=\",OTP_conf_main_reg!K43,1)))","v":"2.22MHz"}]
[null,null,null,"Phase shifting",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!G41,LEN(OTP_conf_main_reg!G41)-FIND(\"-\",OTP_conf_main_reg!G41,1))","v":" delay 3"}]
[null,null,null,"Behavior in case of TSD",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!J45,LEN(OTP_conf_main_reg!J45)-FIND(\"-\",OTP_conf_main_reg!J45,1))","v":" BUCK3 Shutdown"}]
[null,null,null,"Power sequencing slot",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!J35,LEN(OTP_conf_main_reg!J35)-FIND(\"-\",OTP_conf_main_reg!J35,1))","v":" Regulator Start and Stop in Slot 0"}]
[null,null,null,"Soft start ramp",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!G35,LEN(OTP_conf_main_reg!G35)-FIND(\"-\",OTP_conf_main_reg!G35,1))","v":" 10.4mV/µs"}]
[]
[]
[]
[]
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[]
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[]
[null,"Table 2. Main OTP configuration (continued)"]
[null,"Functional block",null,"Feature",null,null,null,"OTP selection"]
[null,"LDO1",null,"Output voltage",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!J29,LEN(OTP_conf_main_reg!J29)-FIND(\"-\",OTP_conf_main_reg!J29,1))","v":" 1.8V"}]
[null,null,null,"Current limitation",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!I29,LEN(OTP_conf_main_reg!I29)-FIND(\"-\",OTP_conf_main_reg!I29,1))","v":" 400mA"}]
[null,null,null,"Behavior in case of TSD",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!K45,LEN(OTP_conf_main_reg!K45)-FIND(\"-\",OTP_conf_main_reg!K45,1))","v":" LDO1 Shutdown"}]
[null,null,null,"Power sequencing slot",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!J33,LEN(OTP_conf_main_reg!J33)-FIND(\"-\",OTP_conf_main_reg!J33,1))","v":" Regulator Start and Stop in Slot 2"}]
[null,"LDO2",null,"Output voltage",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!F29,LEN(OTP_conf_main_reg!F29)-FIND(\"-\",OTP_conf_main_reg!F29,1))","v":" 3.3V"}]
[null,null,null,"Current limitation",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!E29,LEN(OTP_conf_main_reg!E29)-FIND(\"-\",OTP_conf_main_reg!E29,1))","v":" 400mA"}]
[null,null,null,"Behavior in case of TSD",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!L45,LEN(OTP_conf_main_reg!L45)-FIND(\"-\",OTP_conf_main_reg!L45,1))","v":" LDO2 Shutdown"}]
[null,null,null,"Power sequencing slot",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!G33,LEN(OTP_conf_main_reg!G33)-FIND(\"-\",OTP_conf_main_reg!G33,1))","v":" Regulator Start and Stop in Slot 0"}]
[null,"Miscellaneous",null,"Power up/down slot duration",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!I35,LEN(OTP_conf_main_reg!I35)-FIND(\"-\",OTP_conf_main_reg!I35,1))","v":" 1000µs"}]
[null,null,null,"PSYNC",null,null,null,{"$f":"IF(OTP_conf_main_reg!L47=\"1 - Enabled\",RIGHT(OTP_conf_main_reg!K47,LEN(OTP_conf_main_reg!K47)-FIND(\"-\",OTP_conf_main_reg!K47,1)),\"Disabled\")","v":" 2x FS84_QFN48EP"}]
[null,null,null,"PLL enabled",null,null,null,{"$f":"IF(RIGHT(OTP_conf_main_reg!J43,LEN(OTP_conf_main_reg!J43)-FIND(\"-\",OTP_conf_main_reg!J43,1))=\" enabled\", \"Yes\",\"No\")","v":"Yes"}]
[null,null,null,"Deep Fail Safe (autoretry)",null,null,null,{"$f":"IF(OTP_conf_main_reg!J47=\"1 - Enabled\",IF(OTP_conf_main_reg!I47=\"1 - Enabled\",\"Infinite\",\"x15\"),\"Disabled\")","v":"Infinite"}]
[null,null,null,"VSUP power-up threshold",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!L49,LEN(OTP_conf_main_reg!L49)-FIND(\"-\",OTP_conf_main_reg!L49,1))","v":" 4.9V for Vpre < 4.5V"}]
[null,null,null,"Regulator assigned to VDDIO",null,null,null,{"$f":"RIGHT(OTP_conf_main_reg!J53,LEN(OTP_conf_main_reg!J53)-FIND(\"-\",OTP_conf_main_reg!J53,1))","v":" LDO2"}]
[null,null,null,"Device ID",null,null,null,{"$f":"OTP_conf_main_reg!E55","v":"00000001"}]
[]
[null,"Table 3. Fail-safe OTP configuration"]
[null,"Functional block",null,"Feature",null,null,null,"OTP selection"]
[null,"VCOREMON",null,"Monitoring Voltage",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!E5,LEN(OTP_conf_failsafe_reg!E5)-FIND(\"-\",OTP_conf_failsafe_reg!E5,1))","v":" 0.825V"}]
[null,null,null,"OVTH",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!I7,LEN(OTP_conf_failsafe_reg!I7)-FIND(\"-\",OTP_conf_failsafe_reg!I7,1))","v":" 104.5%"}]
[null,null,null,"UVTH",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!I15,LEN(OTP_conf_failsafe_reg!I15)-FIND(\"-\",OTP_conf_failsafe_reg!I15,1))","v":" 95.5%"}]
[null,null,null,"OV_DGLT",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!I29,LEN(OTP_conf_failsafe_reg!I29)-FIND(\"-\",OTP_conf_failsafe_reg!I29,1))","v":" 25µs"}]
[null,null,null,"UV_DGLT",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!G29,LEN(OTP_conf_failsafe_reg!G29)-FIND(\"-\",OTP_conf_failsafe_reg!G29,1))","v":" 25µs"}]
[null,null,null,"SVS_CLAMP",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!H9,LEN(OTP_conf_failsafe_reg!H9)-FIND(\"-\",OTP_conf_failsafe_reg!H9,1))","v":" No SVS"}]
[null,"VDDIOMON",null,"Monitoring Voltage",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!G9,LEN(OTP_conf_failsafe_reg!G9)-FIND(\"-\",OTP_conf_failsafe_reg!G9,1))","v":" 3.3V"}]
[null,null,null,"OVTH",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!E7,LEN(OTP_conf_failsafe_reg!E7)-FIND(\"-\",OTP_conf_failsafe_reg!E7,1))","v":" 104.5%"}]
[null,null,null,"UVTH",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!E15,LEN(OTP_conf_failsafe_reg!E15)-FIND(\"-\",OTP_conf_failsafe_reg!E15,1))","v":" 95.5%"}]
[null,null,null,"OV_DGLT",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!L29,LEN(OTP_conf_failsafe_reg!L29)-FIND(\"-\",OTP_conf_failsafe_reg!L29,1))","v":" 25µs"}]
[null,null,null,"UV_DGLT",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!J29,LEN(OTP_conf_failsafe_reg!J29)-FIND(\"-\",OTP_conf_failsafe_reg!J29,1))","v":" 25µs"}]
[null,"VMON1",null,"OVTH",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!I11,LEN(OTP_conf_failsafe_reg!I11)-FIND(\"-\",OTP_conf_failsafe_reg!I11,1))","v":" 105%"}]
[null,null,null,"UVTH",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!I17,LEN(OTP_conf_failsafe_reg!I17)-FIND(\"-\",OTP_conf_failsafe_reg!I17,1))","v":" 95%"}]
[null,null,null,"OV_DGLT",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!L31,LEN(OTP_conf_failsafe_reg!L31)-FIND(\"-\",OTP_conf_failsafe_reg!L31,1))","v":" 25µs"}]
[null,null,null,"UV_DGLT",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!J31,LEN(OTP_conf_failsafe_reg!J31)-FIND(\"-\",OTP_conf_failsafe_reg!J31,1))","v":" 25µs"}]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[]
[null,"Table 3. Fail-safe OTP configuration (continued)"]
[null,"Functional block",null,"Feature",null,null,null,"OTP selection"]
[null,"VMON2",null,"OVTH",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!E11,LEN(OTP_conf_failsafe_reg!E11)-FIND(\"-\",OTP_conf_failsafe_reg!E11,1))","v":" 104.5%"}]
[null,null,null,"UVTH",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!E17,LEN(OTP_conf_failsafe_reg!E17)-FIND(\"-\",OTP_conf_failsafe_reg!E17,1))","v":" 95.5%"}]
[null,null,null,"OV_DGLT",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!L31,LEN(OTP_conf_failsafe_reg!L31)-FIND(\"-\",OTP_conf_failsafe_reg!L31,1))","v":" 25µs"}]
[null,null,null,"UV_DGLT",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!J31,LEN(OTP_conf_failsafe_reg!J31)-FIND(\"-\",OTP_conf_failsafe_reg!J31,1))","v":" 25µs"}]
[null,"VMON3",null,"OVTH",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!I13,LEN(OTP_conf_failsafe_reg!I13)-FIND(\"-\",OTP_conf_failsafe_reg!I13,1))","v":" 104.5%"}]
[null,null,null,"UVTH",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!I19,LEN(OTP_conf_failsafe_reg!I19)-FIND(\"-\",OTP_conf_failsafe_reg!I19,1))","v":" 95.5%"}]
[null,null,null,"OV_DGLT",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!L31,LEN(OTP_conf_failsafe_reg!L31)-FIND(\"-\",OTP_conf_failsafe_reg!L31,1))","v":" 25µs"}]
[null,null,null,"UV_DGLT",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!J31,LEN(OTP_conf_failsafe_reg!J31)-FIND(\"-\",OTP_conf_failsafe_reg!J31,1))","v":" 25µs"}]
[null,"VMON4",null,"OVTH",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!E13,LEN(OTP_conf_failsafe_reg!E13)-FIND(\"-\",OTP_conf_failsafe_reg!E13,1))","v":" 104.5%"}]
[null,null,null,"UVTH",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!E19,LEN(OTP_conf_failsafe_reg!E19)-FIND(\"-\",OTP_conf_failsafe_reg!E19,1))","v":" 95.5%"}]
[null,null,null,"OV_DGLT",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!L31,LEN(OTP_conf_failsafe_reg!L31)-FIND(\"-\",OTP_conf_failsafe_reg!L31,1))","v":" 25µs"}]
[null,null,null,"UV_DGLT",null,null,null,{"$f":"RIGHT(OTP_conf_failsafe_reg!J31,LEN(OTP_conf_failsafe_reg!J31)-FIND(\"-\",OTP_conf_failsafe_reg!J31,1))","v":" 25µs"}]
[null,"PGOOD",null,"VCOREMON",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!L21,LEN(OTP_conf_failsafe_reg!L21)-FIND(\"-\",OTP_conf_failsafe_reg!L21,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"}]
[null,null,null,"VDDIOMON",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!K21,LEN(OTP_conf_failsafe_reg!K21)-FIND(\"-\",OTP_conf_failsafe_reg!K21,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"}]
[null,null,null,"VMON1",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!J21,LEN(OTP_conf_failsafe_reg!J21)-FIND(\"-\",OTP_conf_failsafe_reg!J21,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"}]
[null,null,null,"VMON2",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!I21,LEN(OTP_conf_failsafe_reg!I21)-FIND(\"-\",OTP_conf_failsafe_reg!I21,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"}]
[null,null,null,"VMON3",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!H21,LEN(OTP_conf_failsafe_reg!H21)-FIND(\"-\",OTP_conf_failsafe_reg!H21,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"}]
[null,null,null,"VMON4",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!G21,LEN(OTP_conf_failsafe_reg!G21)-FIND(\"-\",OTP_conf_failsafe_reg!G21,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"}]
[null,null,null,"RSTB",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!F21,LEN(OTP_conf_failsafe_reg!F21)-FIND(\"-\",OTP_conf_failsafe_reg!F21,1))=\" Assigned\", \"Yes\",\"No\")","v":"No"}]
[null,"ABIST1",null,"VCOREMON",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!L23,LEN(OTP_conf_failsafe_reg!L23)-FIND(\"-\",OTP_conf_failsafe_reg!L23,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"}]
[null,null,null,"VDDIOMON",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!K23,LEN(OTP_conf_failsafe_reg!K23)-FIND(\"-\",OTP_conf_failsafe_reg!K23,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"}]
[null,null,null,"VMON1",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!J23,LEN(OTP_conf_failsafe_reg!J23)-FIND(\"-\",OTP_conf_failsafe_reg!J23,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"}]
[null,null,null,"VMON2",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!I23,LEN(OTP_conf_failsafe_reg!I23)-FIND(\"-\",OTP_conf_failsafe_reg!I23,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"}]
[null,null,null,"VMON3",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!H23,LEN(OTP_conf_failsafe_reg!H23)-FIND(\"-\",OTP_conf_failsafe_reg!H23,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"}]
[null,null,null,"VMON4",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!G23,LEN(OTP_conf_failsafe_reg!G23)-FIND(\"-\",OTP_conf_failsafe_reg!G23,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"}]
[null,"Safety enable",null,"VMON1",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!L25,LEN(OTP_conf_failsafe_reg!L25)-FIND(\"-\",OTP_conf_failsafe_reg!L25,1))=\" Enabled\", \"Yes\",\"No\")","v":"Yes"}]
[null,null,null,"VMON2",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!K25,LEN(OTP_conf_failsafe_reg!K25)-FIND(\"-\",OTP_conf_failsafe_reg!K25,1))=\" Enabled\", \"Yes\",\"No\")","v":"Yes"}]
[null,null,null,"VMON3",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!J25,LEN(OTP_conf_failsafe_reg!J25)-FIND(\"-\",OTP_conf_failsafe_reg!J25,1))=\" Enabled\", \"Yes\",\"No\")","v":"Yes"}]
[null,null,null,"VMON4",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!I25,LEN(OTP_conf_failsafe_reg!I25)-FIND(\"-\",OTP_conf_failsafe_reg!I25,1))=\" Enabled\", \"Yes\",\"No\")","v":"Yes"}]
[null,null,null,"FCCU",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!H25,LEN(OTP_conf_failsafe_reg!H25)-FIND(\"-\",OTP_conf_failsafe_reg!H25,1))=\" Enabled\", \"Yes\",\"No\")","v":"Yes"}]
[null,null,null,"WATCHDOG",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!E25,LEN(OTP_conf_failsafe_reg!E25)-FIND(\"-\",OTP_conf_failsafe_reg!E25,1))=\" Enabled\", RIGHT(OTP_conf_failsafe_reg!F25,LEN(OTP_conf_failsafe_reg!F25)-FIND(\"-\",OTP_conf_failsafe_reg!F25,1)),\"No\")","v":" Simple WD"}]
[null,null,null,"FLT_RECOVERY",null,null,null,{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!H27,LEN(OTP_conf_failsafe_reg!H27)-FIND(\"-\",OTP_conf_failsafe_reg!H27,1))=\" Enabled\", \"Yes\",\"No\")","v":"Yes"}]
[]
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[" 8    Legal information"]
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[" Contents"]
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[null,null,null,null,null,null,null,null,null,"Date of release:",{"$f":"TODAY()","v":"2021-11-22"}]
[null,null,null,null,null,null,null,null,null,null,{"$f":"_xlfn.CONCAT(\"Document identifier: \",K2)","v":"Document identifier: R_PFS8416AMBGJES_rev_B"}]

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[null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"IFERROR(MID(D5, SEARCH(\"FS8\",D5,1),9),\"\")","v":""},{"$f":"IFERROR(MID(D5, SEARCH(\"FS8\",D5,1),4),\"\")","v":""}]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"IF(Q1=\"\",\"\",IFERROR(MATCH(UPPER(Q1),OTP_conf_file_generation!I11:I24,0),-1))","v":""},{"$f":"IF(R1=\"\",\"\",IFERROR(MATCH(UPPER(R1),LEFT(OTP_conf_file_generation!I11:I24,4),0),-1))","v":""}]
[null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"IFERROR(MID(D5, SEARCH(\"FS8\",D5,1)+9,2),\"\")","v":""},{"$f":"IFERROR(MID(D5, SEARCH(\"FS8\",D5,1)+6,2),\"\")","v":""}]
[null,null,null,"Part Number",null,"Rev",null,null,null,null,null,null,null,null,"OTP type","Device family","OTP program ID","Package","OTP ID revision"]
["Silicon & Flavor","C0",null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"INDEX(OTP_conf_file_generation!G19:G21,IF(ISNA(O6),1,O6))","v":"P - Sampling"},{"$f":"IF(P6=\"\",OTP_conf_file_generation!I18,INDEX(OTP_conf_file_generation!I11:I24,IFERROR(MATCH(UPPER(P6),OTP_conf_file_generation!I11:I24,0),IFERROR(MATCH(UPPER(P6),LEFT(OTP_conf_file_generation!I11:I24,6),0),8))))","v":"FS8416AMB"},{"$f":"IF(OR(Q6=\"\",LEN(Q6)<2),\"--\",UPPER(Q6))","v":"--"},{"$f":"IF(R6=\"\",OTP_conf_file_generation!G17,INDEX(OTP_conf_file_generation!G16:G17,IFERROR(MATCH(UPPER(R6),LEFT(OTP_conf_file_generation!G16:G17,2),0),2)))","v":"ES - Step Cut"},{"$f":"IF(S6=\"\",\"-\",IFERROR(UPPER(S6),\"-\"))","v":"-"}]
["Customer & Application",null,null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"MATCH(LEFT(D5,1),LEFT(OTP_conf_file_generation!G19:G21,1),0)","v":{"$error":"#N/A"}},{"$f":"IFERROR(MID(D5, SEARCH(\"FS8\",D5,1),9),\"\")","v":""},{"$f":"IFERROR(IF(Q2>=0,Q3,IF(R2>=0,R3,NaN)),\"\")","v":""},{"$f":"IFERROR(MID(D5, SEARCH(\"FS\",D5,1)+11,2),\"\")","v":""},{"$f":"RIGHT(F5,1)","v":""}]
["MAIN",null,null,null,null,null,null,null,null,null,null,null,null,null,"Register","Bit7","Bit6","Bit5","Bit4","Bit3","Bit2","Bit1","Bit0"]
[14,"0F",null,{"$f":"HEX2BIN(B8,8)","v":"00001111"},null,{"$f":"LEFT(D8,1)","v":"0"},{"$f":"MID(D8,2,1)","v":"0"},{"$f":"MID(D8,3,1)","v":"0"},{"$f":"MID(D8,4,1)","v":"0"},{"$f":"MID(D8,5,1)","v":"1"},{"$f":"MID(D8,6,1)","v":"1"},{"$f":"MID(D8,7,1)","v":"1"},{"$f":"RIGHT(D8,1)","v":"1"},null,"OTP_CFG_VPRE_1",0,0,{"$f":"VLOOKUP(_xlfn.CONCAT(H8:M8),OTP_conf_main_bits!B2:C6,2,FALSE)","v":"001111 - 3.3V"}]
[15,5,null,{"$f":"HEX2BIN(B9,8)","v":"00000101"},null,"0","0","0",{"$f":"MID(D9,4,1)","v":"0"},"0","1","0","1",null,"OTP_CFG_VPRE_2",0,0,{"$f":"VLOOKUP(_xlfn.CONCAT(H9:M9),OTP_conf_main_bits!B8:C18,2,FALSE)","v":"000101 - 50mV/µs"}]
[16,"6F",null,"01101111",null,"0","1","1","0","1","1","1","1",null,"OTP_CFG_VPRE_3",{"$f":"VLOOKUP(_xlfn.CONCAT(F10,G10),OTP_conf_main_bits!B20:C23,2,FALSE)","v":"01 - 80mV"},null,{"$f":"VLOOKUP(_xlfn.CONCAT(H10,I10),OTP_conf_main_bits!B25:C25,2,FALSE)","v":"10 - 40ns"},null,"11 - PU/PD/900mA",null,{"$f":"VLOOKUP(_xlfn.CONCAT(L10,M10),OTP_conf_main_bits!B29:C32,2,FALSE)","v":"11 - PU/PD/900mA"}]
[17,6,null,"00000110",null,"0","0","0","0","0","1","1","0",null,"OTP_CFG_BOOST_1",0,0,{"$f":"VLOOKUP(H11,OTP_conf_main_bits!B34:C35,2,FALSE)","v":"0 - Force PWM"},0,{"$f":"VLOOKUP(_xlfn.CONCAT(J11:M11),OTP_conf_main_bits!B37:C38,2,FALSE)","v":"0110 - 5.00V"}]
[18,"8C",null,"10001100",null,"1","0","0","0","1","1","0","0",null,"OTP_CFG_BOOST_2",{"$f":"VLOOKUP(F12,OTP_conf_main_bits!B40:C41,2,FALSE)","v":"1 - Enabled"},{"$f":"VLOOKUP(_xlfn.CONCAT(G12,H12),OTP_conf_main_bits!B43:C44,2,FALSE)","v":"00 - 60ns"},null,{"$f":"VLOOKUP(_xlfn.CONCAT(I12:M12),OTP_conf_main_bits!B46:C48,2,FALSE)","v":"01100 - 125mV/µs"}]
[19,7,null,"00000111",null,"0","0","0","0","0","1","1","1",null,"OTP_CFG_BOOST_3",{"$f":"VLOOKUP(_xlfn.CONCAT(F13,G13),OTP_conf_main_bits!B50:C51,2,FALSE)","v":"00 - 750kohms"},null,{"$f":"VLOOKUP(_xlfn.CONCAT(H13,I13),OTP_conf_main_bits!B53:C53,2,FALSE)","v":"00 - 125pF"},null,{"$f":"VLOOKUP(_xlfn.CONCAT(J13,K13),OTP_conf_main_bits!B55:C55,2,FALSE)","v":"01 - 2A"},null,{"$f":"VLOOKUP(_xlfn.CONCAT(L13,M13),OTP_conf_main_bits!B57:C58,2,FALSE)","v":"11 - 500V/µs"}]
["1A",44,null,"01000100",null,"0","1","0","0","0","1","0","0",null,"OTP_CFG_BUCK1_1",{"$f":"VLOOKUP(_xlfn.CONCAT(F14:M14),OTP_conf_main_bits!B60:C81,2,FALSE)","v":"01000100 - 0.825V"}]
["1B",6,null,"00000110",null,"0","0","0","0","0","1","1","0",null,"OTP_CFG_BUCK1_2",0,0,0,{"$f":"VLOOKUP(_xlfn.CONCAT(I15:J15),OTP_conf_main_bits!B83:C85,2,FALSE)","v":"00 - 1µH"},null,{"$f":"VLOOKUP(_xlfn.CONCAT(K15:L15),OTP_conf_main_bits!B87:C88,2,FALSE)","v":"11 - 4.5A"},null,0]
["1C","B1",null,"10110001",null,"1","0","1","1","0","0","0","1",null,"OTP_CFG_BUCK2_1","00000000"]
["1D",4,null,"00000100",null,"0","0","0","0","0","1","0","0",null,"OTP_CFG_BUCK2_2",0,"00",null,0,"00",null,{"$f":"VLOOKUP(L17,OTP_conf_main_bits!B90:C90,2,FALSE)","v":"0 - Default"},{"$f":"VLOOKUP(M17,OTP_conf_main_bits!B92:C92,2,FALSE)","v":"0 - Default"}]
["1E",90,null,"10010000",null,"1","0","0","1","0","0","0","0",null,"OTP_CFG_BUCK3_1",{"$f":"VLOOKUP(F18,OTP_conf_main_bits!B94:C95,2,FALSE)","v":"1 - Enabled"},{"$f":"VLOOKUP(_xlfn.CONCAT(G18:H18),OTP_conf_main_bits!B97:C99,2,FALSE)","v":"00 - 1µH"},null,{"$f":"VLOOKUP(_xlfn.CONCAT(I18,J18,K18,L18,M18),OTP_conf_main_bits!B101:C113,2,FALSE)","v":"10000 - 2.5V"}]
["1F",93,null,"10010011",null,"1","0","0","1","0","0","1","1",null,"OTP_CFG_BUCK3_2","000",null,null,{"$f":"VLOOKUP(_xlfn.CONCAT(I19:K19),OTP_conf_main_bits!B115:C120,2,FALSE)","v":"100 - 65 GM"},null,null,{"$f":"VLOOKUP(_xlfn.CONCAT(L19:M19),OTP_conf_main_bits!B122:C123,2,FALSE)","v":"11 - 4.5A"}]
[20,63,null,"01100011",null,"0","1","1","0","0","0","1","1",null,"OTP_CFG_LDO",{"$f":"VLOOKUP(F20,OTP_conf_main_bits!B125:C126,2,FALSE)","v":"0 - 400mA"},{"$f":"VLOOKUP(_xlfn.CONCAT(G20:I20),OTP_conf_main_bits!B128:C135,2,FALSE)","v":"110 - 3.3V"},null,null,{"$f":"VLOOKUP(J20,OTP_conf_main_bits!B137:C138,2,FALSE)","v":"0 - 400mA"},{"$f":"VLOOKUP(_xlfn.CONCAT(K20:M20),OTP_conf_main_bits!B140:C147,2,FALSE)","v":"011 - 1.8V"}]
[21,3,null,"00000011",null,"0","0","0","0","0","0","1","1",null,"OTP_CFG_SEQ_1",0,0,"000",null,null,{"$f":"VLOOKUP(_xlfn.CONCAT(K21:M21),OTP_conf_main_bits!B149:C156,2,FALSE)","v":"011 - Regulator Start and Stop in Slot 3"}]
[22,"0A",null,"00001010",null,"0","0","0","0","1","0","1","0",null,"OTP_CFG_SEQ_2",0,0,{"$f":"VLOOKUP(_xlfn.CONCAT(H22:J22),OTP_conf_main_bits!B158:C165,2,FALSE)","v":"001 - Regulator Start and Stop in Slot 1"},null,null,{"$f":"VLOOKUP(_xlfn.CONCAT(K22:M22),OTP_conf_main_bits!B167:C174,2,FALSE)","v":"010 - Regulator Start and Stop in Slot 2"}]
[23,8,null,"00001000",null,"0","0","0","0","1","0","0","0",null,"OTP_CFG_SEQ_3",{"$f":"VLOOKUP(_xlfn.CONCAT(F23,G23),OTP_conf_main_bits!B185:C188,2,FALSE)","v":"00 - 7.81mV/µs"},null,{"$f":"VLOOKUP(_xlfn.CONCAT(H23,I23),OTP_conf_main_bits!B190:C193,2,FALSE)","v":"00 - 10.4mV/µs"},null,{"$f":"VLOOKUP(J23,OTP_conf_main_bits!B195:C196,2,FALSE)","v":"1 - 1000µs"},{"$f":"VLOOKUP(_xlfn.CONCAT(K23:M23),OTP_conf_main_bits!B176:C183,2,FALSE)","v":"000 - Regulator Start and Stop in Slot 0"}]
[24,4,null,"00000100",null,"0","0","0","0","0","1","0","0",null,"OTP_CFG_CLOCK_1",0,0,{"$f":"VLOOKUP(_xlfn.CONCAT(H24:J24),OTP_conf_main_bits!B198:C205,2,FALSE)","v":"000 - delay 0"},null,null,{"$f":"VLOOKUP(_xlfn.CONCAT(K24:M24),OTP_conf_main_bits!B207:C214,2,FALSE)","v":"100 - divide by 44 - CLK2=455KHz"}]
[25,30,null,"00110000",null,"0","0","1","1","0","0","0","0",null,"OTP_CFG_CLOCK_2",0,0,{"$f":"VLOOKUP(_xlfn.CONCAT(H25:J25),OTP_conf_main_bits!B216:C223,2,FALSE)","v":"110 - delay 6"},null,null,{"$f":"VLOOKUP(_xlfn.CONCAT(K25:M25),OTP_conf_main_bits!B225:C232,2,FALSE)","v":"000 - delay 0"}]
[26,18,null,"00011000",null,"0","0","0","1","1","0","0","0",null,"OTP_CFG_CLOCK_3",0,0,{"$f":"VLOOKUP(_xlfn.CONCAT(H26:J26),OTP_conf_main_bits!B234:C241,2,FALSE)","v":"011 - delay 3"},null,null,"000"]
[27,"0E",null,"00001110",null,"0","0","0","0","1","1","1","0",null,"OTP_CFG_CLOCK_4",{"$f":"VLOOKUP(F27,OTP_conf_main_bits!B243:C243,2,FALSE)","v":"0 - CLK1"},0,{"$f":"VLOOKUP(H27,OTP_conf_main_bits!B245:C245,2,FALSE)","v":"0 - CLK1"},{"$f":"VLOOKUP(I27,OTP_conf_main_bits!B247:C247,2,FALSE)","v":"0 - CLK1"},{"$f":"VLOOKUP(J27,OTP_conf_main_bits!B249:C250,2,FALSE)","v":"1 - CLK2"},{"$f":"VLOOKUP(K27,OTP_conf_main_bits!B252:C253,2,FALSE)","v":"1 - Enabled"},{"$f":"VLOOKUP(_xlfn.CONCAT(L27:M27),OTP_conf_main_bits!B255:C258,2,FALSE)","v":"10 - divide by 9  - CLK1=2.22MHz"}]
[28,0,null,"00000000",null,"0","0","0","0","0","0","0","0",null,"OTP_CFG_SM_1",0,0,{"$f":"VLOOKUP(H28,OTP_conf_main_bits!B272:C273,2,FALSE)","v":"0 - BOOST Shutdown"},{"$f":"VLOOKUP(I28,OTP_conf_main_bits!B269:C270,2,FALSE)","v":"0 - BUCK1 Shutdown"},0,{"$f":"VLOOKUP(K28,OTP_conf_main_bits!B266:C267,2,FALSE)","v":"0 - BUCK3 Shutdown"},{"$f":"VLOOKUP(L28,OTP_conf_main_bits!B263:C264,2,FALSE)","v":"0 - LDO1 Shutdown"},{"$f":"VLOOKUP(M28,OTP_conf_main_bits!B260:C261,2,FALSE)","v":"0 - LDO2 Shutdown"}]
[29,"1C",null,"00011100",null,"0","0","0","1","1","1","0","0",null,"OTP_CFG_SM_2",0,0,0,{"$f":"VLOOKUP(I29,OTP_conf_main_bits!B275:C276,2,FALSE)","v":"1 - 32ms"},{"$f":"VLOOKUP(J29,OTP_conf_main_bits!B278:C279,2,FALSE)","v":"1 - Enabled"},{"$f":"VLOOKUP(K29,OTP_conf_main_bits!B281:C282,2,FALSE)","v":"1 - Enabled"},{"$f":"VLOOKUP(L29,OTP_conf_main_bits!B284:C285,2,FALSE)","v":"0 - 2x FS84_QFN48EP"},{"$f":"VLOOKUP(M29,OTP_conf_main_bits!B287:C288,2,FALSE)","v":"0 - Disabled"}]
["2A",0,null,"00000000",null,"0","0","0","0","0","0","0","0",null,"OTP_CFG_VSUP_UV",{"$f":"_xlfn.CONCAT(F30:L30)","v":"0000000"},null,null,null,null,null,null,{"$f":"VLOOKUP(M30,OTP_conf_main_bits!B290:C291,2,FALSE)","v":"0 - 4.9V for Vpre < 4.5V"}]
["2B",0,null,"00000000",null,"0","0","0","0","0","0","0","0",null,"OTP_CFG_I2C",0,0,0,0,"0000"]
["2C",3,null,"00000011",null,"0","0","0","0","0","0","1","1",null,"OTP_CFG_OV",0,0,0,0,0,{"$f":"VLOOKUP(_xlfn.CONCAT(K32:M32),OTP_conf_main_bits!B293:C300,2,FALSE)","v":"011 - LDO2"}]
["2D",1,null,"00000001",null,"0","0","0","0","0","0","0","1",null,"OTP_CFG_DEVID",{"$f":"_xlfn.CONCAT(F33:M33)","v":"00000001"}]
["2E",0,null,"00000000",null,"0","0","0","0","0","0","0","0",null,"OTP_M_S1_CRC_LSB",0,0,0,0,0,0,0,0]
["2F",0,null,"00000000",null,"0","0","0","0","0","0","0","0",null,"OTP_M_S1_CRC_MSB",0,0,0,0,0,0,0,0]
["FAILSAFE",null,null,null,null,null,null,null,null,null,null,null,null,null,"Register","Bit7","Bit6","Bit5","Bit4","Bit3","Bit2","Bit1","Bit0"]
["0A",44,null,"01000100",null,{"$f":"LEFT(D37,1)","v":"0"},{"$f":"MID(D37,2,1)","v":"1"},{"$f":"MID(D37,3,1)","v":"0"},"0",{"$f":"MID(D37,5,1)","v":"0"},{"$f":"MID(D37,6,1)","v":"1"},{"$f":"MID(D37,7,1)","v":"0"},{"$f":"RIGHT(D37,1)","v":"0"},null,"OTP_CFG_UVOV_1",{"$f":"P14","v":"01000100 - 0.825V"}]
["0B",0,null,"00000000",null,"0","0","0","0","0","0","0","0",null,"OTP_CFG_UVOV_2",{"$f":"VLOOKUP(_xlfn.CONCAT(F38:I38),OTP_conf_failsafe_bits!B3:C18,2,FALSE)","v":"0000 - 104.5%"},null,null,null,{"$f":"VLOOKUP(_xlfn.CONCAT(J38:M38),OTP_conf_failsafe_bits!B20:C35,2,FALSE)","v":"0000 - 104.5%"}]
["0C",0,null,"00000000",null,"0","0","0","0","0","0","0","0",null,"OTP_CFG_UVOV_3",0,0,{"$f":"VLOOKUP(H39,OTP_conf_failsafe_bits!B37:C38,2,FALSE)","v":"0 - 3.3V"},{"$f":"VLOOKUP(_xlfn.CONCAT(I39:M39),OTP_conf_failsafe_bits!B40:C44,2,FALSE)","v":"00000 - No SVS"}]
["0D",1,null,"00000001",null,"0","0","0","0","0","0","0","1",null,"OTP_CFG_UVOV_4",{"$f":"VLOOKUP(_xlfn.CONCAT(F40:I40),OTP_conf_failsafe_bits!B46:C61,2,FALSE)","v":"0000 - 104.5%"},null,null,null,{"$f":"VLOOKUP(_xlfn.CONCAT(J40:M40),OTP_conf_failsafe_bits!B63:C78,2,FALSE)","v":"0001 - 105%"}]
["0E",0,null,"00000000",null,"0","0","0","0","0","0","0","0",null,"OTP_CFG_UVOV_5",{"$f":"VLOOKUP(_xlfn.CONCAT(F41:I41),OTP_conf_failsafe_bits!B80:C95,2,FALSE)","v":"0000 - 104.5%"},null,null,null,{"$f":"VLOOKUP(_xlfn.CONCAT(J41:M41),OTP_conf_failsafe_bits!B97:C112,2,FALSE)","v":"0000 - 104.5%"}]
["0F",0,null,"00000000",null,"0","0","0","0","0","0","0","0",null,"OTP_CFG_UVOV_6",{"$f":"VLOOKUP(_xlfn.CONCAT(F42:I42),OTP_conf_failsafe_bits!B114:C129,2,FALSE)","v":"0000 - 95.5%"},null,null,null,{"$f":"VLOOKUP(_xlfn.CONCAT(J42:M42),OTP_conf_failsafe_bits!B131:C146,2,FALSE)","v":"0000 - 95.5%"}]
[10,1,null,"00000001",null,"0","0","0","0","0","0","0","1",null,"OTP_CFG_UVOV_7",{"$f":"VLOOKUP(_xlfn.CONCAT(F43:I43),OTP_conf_failsafe_bits!B148:C163,2,FALSE)","v":"0000 - 95.5%"},null,null,null,{"$f":"VLOOKUP(_xlfn.CONCAT(J43:M43),OTP_conf_failsafe_bits!B165:C180,2,FALSE)","v":"0001 - 95%"}]
[11,0,null,"00000000",null,"0","0","0","0","0","0","0","0",null,"OTP_CFG_UVOV_8",{"$f":"VLOOKUP(_xlfn.CONCAT(F44:I44),OTP_conf_failsafe_bits!B182:C197,2,FALSE)","v":"0000 - 95.5%"},null,null,null,{"$f":"VLOOKUP(_xlfn.CONCAT(J44:M44),OTP_conf_failsafe_bits!B199:C214,2,FALSE)","v":"0000 - 95.5%"}]
[12,"1F",null,"00011111",null,"0","0","0","1","1","1","1","1",null,"OTP_CFG_PGOOD",0,{"$f":"VLOOKUP(G45,OTP_conf_failsafe_bits!B216:C217,2,FALSE)","v":"0 - Not assigned"},{"$f":"VLOOKUP(H45,OTP_conf_failsafe_bits!B219:C220,2,FALSE)","v":"0 - Not assigned"},{"$f":"VLOOKUP(I45,OTP_conf_failsafe_bits!B222:C223,2,FALSE)","v":"1 - Assigned"},{"$f":"VLOOKUP(J45,OTP_conf_failsafe_bits!B225:C226,2,FALSE)","v":"1 - Assigned"},{"$f":"VLOOKUP(K45,OTP_conf_failsafe_bits!B228:C229,2,FALSE)","v":"1 - Assigned"},{"$f":"VLOOKUP(L45,OTP_conf_failsafe_bits!B231:C232,2,FALSE)","v":"1 - Assigned"},{"$f":"VLOOKUP(M45,OTP_conf_failsafe_bits!B234:C235,2,FALSE)","v":"1 - Assigned"}]
[13,"3F",null,"00111111",null,"0","0","1","1","1","1","1","1",null,"OTP_CFG_ABIST1","00",null,{"$f":"VLOOKUP(H46,OTP_conf_failsafe_bits!B237:C238,2,FALSE)","v":"1 - Assigned"},{"$f":"VLOOKUP(I46,OTP_conf_failsafe_bits!B240:C241,2,FALSE)","v":"1 - Assigned"},{"$f":"VLOOKUP(J46,OTP_conf_failsafe_bits!B243:C244,2,FALSE)","v":"1 - Assigned"},{"$f":"VLOOKUP(K46,OTP_conf_failsafe_bits!B246:C247,2,FALSE)","v":"1 - Assigned"},{"$f":"VLOOKUP(L46,OTP_conf_failsafe_bits!B249:C250,2,FALSE)","v":"1 - Assigned"},{"$f":"VLOOKUP(M46,OTP_conf_failsafe_bits!B252:C253,2,FALSE)","v":"1 - Assigned"}]
[14,"1F",null,"00011111",null,"0","0","0","1","1","1","1","1",null,"OTP_CFG_ASIL",{"$f":"VLOOKUP(F47,OTP_conf_failsafe_bits!B255:C256,2,FALSE)","v":"0 - Enabled"},"0 - Simple WD",0,{"$f":"VLOOKUP(I47,OTP_conf_failsafe_bits!B261:C262,2,FALSE)","v":"1 - Enabled"},{"$f":"VLOOKUP(J47,OTP_conf_failsafe_bits!B264:C265,2,FALSE)","v":"1 - Enabled"},{"$f":"VLOOKUP(K47,OTP_conf_failsafe_bits!B267:C268,2,FALSE)","v":"1 - Enabled"},{"$f":"VLOOKUP(L47,OTP_conf_failsafe_bits!B270:C271,2,FALSE)","v":"1 - Enabled"},{"$f":"VLOOKUP(M47,OTP_conf_failsafe_bits!B273:C274,2,FALSE)","v":"1 - Enabled"}]
[15,10,null,"00010000",null,"0","0","0","1","0","0","0","0",null,"OTP_CFG_I2C","000",null,null,{"$f":"VLOOKUP(I48,OTP_conf_failsafe_bits!B276:C277,2,FALSE)","v":"1 - Enabled"},{"$f":"_xlfn.CONCAT(J48:M48)","v":"0000"}]
[16,24,null,"00100100",null,"0","0","1","0","0","1","0","0",null,"OTP_CFG_DGLT_DUR_1","00",null,{"$f":"VLOOKUP(_xlfn.CONCAT(H49:I49),OTP_conf_failsafe_bits!B279:C282,2,FALSE)","v":"10 - 25µs"},null,{"$f":"VLOOKUP(J49,OTP_conf_failsafe_bits!B284:C285,2,FALSE)","v":"0 - 25µs"},{"$f":"VLOOKUP(_xlfn.CONCAT(K49:L49),OTP_conf_failsafe_bits!B287:C290,2,FALSE)","v":"10 - 25µs"},null,{"$f":"VLOOKUP(M49,OTP_conf_failsafe_bits!B292:C293,2,FALSE)","v":"0 - 25µs"}]
[17,4,null,"00000100",null,"0","0","0","0","0","1","0","0",null,"OTP_CFG_DGLT_DUR_2","00000",null,null,null,null,{"$f":"VLOOKUP(_xlfn.CONCAT(K50:L50),OTP_conf_failsafe_bits!B295:C298,2,FALSE)","v":"10 - 25µs"},null,{"$f":"VLOOKUP(M50,OTP_conf_failsafe_bits!B300:C301,2,FALSE)","v":"0 - 25µs"}]
[18,0,null,"00000000",null,"0","0","0","0","0","0","0","0",null,"OTP_FS_S1_CRC_LSB",0,0,0,0,0,0,0,0]
[19,0,null,"00000000",null,"0","0","0","0","0","0","0","0",null,"OTP_FS_S1_CRC_MSB",0,0,0,0,0,0,0,0]

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["Logic","Register  Name","Register Address","Data"]
[]
["Main","OTP_CFG_VPRE_1","14",{"$f":"OTP_conf_main_reg!N5","v":"0x0F"},null,"Device family","FS8416AMB","Silicon","C0"]
["Main","OTP_CFG_VPRE_2","15",{"$f":"OTP_conf_main_reg!N7","v":"0x05"},null,"Part Number:",{"$f":"LEFT(G10,1)&G3&LEFT(UPPER(G12),2)&LEFT(G11,2)","v":"PFS8416AMBGJES"},"Flavor",{"$f":"G4 & \", Rev \" & G13","v":"PFS8416AMBGJES, Rev B"}]
["Main","OTP_CFG_VPRE_3","16",{"$f":"OTP_conf_main_reg!N9","v":"0xEF"},null,"Customer:",null,"Customer:"]
["Main","OTP_CFG_BOOST_1","17",{"$f":"OTP_conf_main_reg!N11","v":"0x06"},null,"Author:",null,"Application"]
["Main","OTP_CFG_BOOST_2","18",{"$f":"OTP_conf_main_reg!N13","v":"0x8C"},null,"File revision:","1.4","File repository:","C:\\"]
["Main","OTP_CFG_BOOST_3","19",{"$f":"OTP_conf_main_reg!N15","v":"0x07"},null,"File repository:","C:\\Users\\nxf32138\\Documents\\aaatest2.txt","File name:",{"$f":"I3&\"_\"&G4&\"_Rev\"&G13&\"_\"&I5&\"_\"&I6&\"_ATE.txt\"","v":"C0_PFS8416AMBGJES_RevB___ATE.txt"}]
["Main","OTP_CFG_BUCK1_1","1A",{"$f":"OTP_conf_main_reg!N17","v":"0x44"}]
["Main","OTP_CFG_BUCK1_2","1B",{"$f":"OTP_conf_main_reg!N19","v":"0x06"},null,"OTP type","P - Sampling",null,"Device options","BUCK3","LDO2","Psync","Ipre max","VMONx","FCCU","ABIST","ASIL"]
["Main","OTP_CFG_BUCK2_1","1C",{"$f":"OTP_conf_main_reg!N21","v":"0x00"},null,"Package","ES - Step Cut",null,"FS8401AMM","No","No","No","5A",0,"No","No","QM"]
["Main","OTP_CFG_BUCK2_2","1D",{"$f":"OTP_conf_main_reg!N23","v":"0x00"},null,"OTP program ID","GJ",null,"FS8401AMB","No","No","No","5A","up to 2","Yes","Yes","B"]
["Main","OTP_CFG_BUCK3_1","1E",{"$f":"OTP_conf_main_reg!N25","v":"0x8E"},null,"OTP ID revision","B",null,"FS8402AMB","No","Yes","Yes","5A","up to 4","Yes","Yes","B"]
["Main","OTP_CFG_BUCK3_2","1F",{"$f":"OTP_conf_main_reg!N27","v":"0x13"},null,null,null,null,"FS8406AMB","No","Yes","Yes","10A","up to 4","Yes","Yes","B"]
["Main","OTP_CFG_LDO","20",{"$f":"OTP_conf_main_reg!N29","v":"0x63"},null,null,null,null,"FS8411AMM","Yes","No","No","5A",0,"No","No","QM"]
["Main","OTP_CFG_SEQ_1","21",{"$f":"OTP_conf_main_reg!N31","v":"0x03"},null,"KS - Dimple",null,null,"FS8411AMB","Yes","No","No","5A","up to 2","Yes","Yes","B"]
["Main","OTP_CFG_SEQ_2","22",{"$f":"OTP_conf_main_reg!N33","v":"0x02"},null,null,"ES - Step Cut",null,"FS8412AMB","Yes","Yes","Yes","5A","up to 4","Yes","Yes","B"]
["Main","OTP_CFG_SEQ_3","23",{"$f":"OTP_conf_main_reg!N35","v":"0x08"},null,null,null,null,"FS8416AMB","Yes","Yes","Yes","10A","up to 4","Yes","Yes","B"]
["Main","OTP_CFG_CLOCK_1","24",{"$f":"OTP_conf_main_reg!N37","v":"0x04"},null,null,"P - Sampling",null,"FS8401AMC","No","No","No","5A","up to 2","Yes","Yes","C"]
["Main","OTP_CFG_CLOCK_2","25",{"$f":"OTP_conf_main_reg!N39","v":"0x30"},null,null,"S - Custom Production",null,"FS8402AMC","No","Yes","Yes","5A","up to 4","Yes","Yes","C"]
["Main","OTP_CFG_CLOCK_3","26",{"$f":"OTP_conf_main_reg!N41","v":"0x18"},null,null,"M - Standard Production",null,"FS8406AMC","No","Yes","Yes","10A","up to 4","Yes","Yes","C"]
["Main","OTP_CFG_CLOCK_4","27",{"$f":"OTP_conf_main_reg!N43","v":"0x0E"},null,null,null,null,"FS8411AMC","Yes","No","No","5A","up to 2","Yes","Yes","C"]
["Main","OTP_CFG_SM_1","28",{"$f":"OTP_conf_main_reg!N45","v":"0x00"},null,null,"A",null,"FS8412AMC","Yes","Yes","Yes","5A","up to 4","Yes","Yes","C"]
["Main","OTP_CFG_SM_2","29",{"$f":"OTP_conf_main_reg!N47","v":"0x0D"},null,null,"B",null,"FS8416AMC","Yes","Yes","Yes","10A","up to 4","Yes","Yes","C"]
["Main","OTP_CFG_VSUP_UV","2A",{"$f":"OTP_conf_main_reg!N49","v":"0x00"},null,null,"C"]
["Main","OTP_CFG_I2C","2B",{"$f":"OTP_conf_main_reg!N51","v":"0x00"},null,null,"D"]
["Main","OTP_CFG_OV","2C",{"$f":"OTP_conf_main_reg!N53","v":"0x03"},null,null,"E"]
["Main","OTP_CFG_DEVID","2D",{"$f":"OTP_conf_main_reg!N55","v":"0x01"},null,null,"F",null,{"$f":"MATCH(G3,I11:I24,)","v":8},{"$f":"INDEX(J11:J24,$I$28)","v":"Yes"},{"$f":"INDEX(K11:K24,$I$28)","v":"Yes"},{"$f":"INDEX(L11:L24,$I$28)","v":"Yes"},{"$f":"INDEX(M11:M24,$I$28)","v":"10A"},{"$f":"INDEX(N11:N24,$I$28)","v":"up to 4"},{"$f":"INDEX(O11:O24,$I$28)","v":"Yes"},{"$f":"INDEX(P11:P24,$I$28)","v":"Yes"},{"$f":"INDEX(Q11:Q24,$I$28)","v":"B"}]
["Main","OTP_M_S1_CRC_LSB","2E",{"$f":"OTP_conf_main_reg!N57","v":"0x00"},null,null,null,null,null,"Yes","Yes","Yes","10A","up to 4","Yes","Yes","B"]
["Main","OTP_M_S1_CRC_MSB","2F",{"$f":"OTP_conf_main_reg!N59","v":"0x00"}]
["FailSafe","OTP_CFG_UVOV_1","0A",{"$f":"OTP_conf_failsafe_reg!N5","v":"0x44"}]
["FailSafe","OTP_CFG_UVOV_2","0B",{"$f":"OTP_conf_failsafe_reg!N7","v":"0x00"}]
["FailSafe","OTP_CFG_UVOV_3","0C",{"$f":"OTP_conf_failsafe_reg!N9","v":"0x00"}]
["FailSafe","OTP_CFG_UVOV_4","0D",{"$f":"OTP_conf_failsafe_reg!N11","v":"0x01"}]
["FailSafe","OTP_CFG_UVOV_5","0E",{"$f":"OTP_conf_failsafe_reg!N13","v":"0x00"}]
["FailSafe","OTP_CFG_UVOV_6","0F",{"$f":"OTP_conf_failsafe_reg!N15","v":"0x00"}]
["FailSafe","OTP_CFG_UVOV_7","10",{"$f":"OTP_conf_failsafe_reg!N17","v":"0x01"}]
["FailSafe","OTP_CFG_UVOV_8","11",{"$f":"OTP_conf_failsafe_reg!N19","v":"0x00"}]
["FailSafe","OTP_CFG_PGOOD","12",{"$f":"OTP_conf_failsafe_reg!N21","v":"0x3F"}]
["FailSafe","OTP_CFG_ABIST1","13",{"$f":"OTP_conf_failsafe_reg!N23","v":"0x3F"}]
["FailSafe","OTP_CFG_ASIL","14",{"$f":"OTP_conf_failsafe_reg!N25","v":"0x1F"}]
["FailSafe","OTP_CFG_I2C","15",{"$f":"OTP_conf_failsafe_reg!N27","v":"0x10"}]
["FailSafe","OTP_CFG_DGLT_DUR_1","16",{"$f":"OTP_conf_failsafe_reg!N29","v":"0x24"}]
["FailSafe","OTP_CFG_DGLT_DUR_2","17",{"$f":"OTP_conf_failsafe_reg!N31","v":"0x04"}]
["FailSafe","OTP_FS_S1_CRC_LSB","18",{"$f":"OTP_conf_failsafe_reg!N33","v":"0x00"}]
["FailSafe","OTP_FS_S1_CRC_MSB","19",{"$f":"OTP_conf_failsafe_reg!N35","v":"0x00"}]

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[null,null,null,null,null,null,"dt",{"$f":"(LEFT($B$65,LEN($B$65)-2)/10000)","v":0.1},null,null,null,{"$f":"B40","v":" Regulator Start and Stop in Slot 3"},{"$f":"B52","v":" Regulator Start and Stop in Slot 0"},{"$f":"B58","v":" Regulator Start and Stop in Slot 2"},{"$f":"B63","v":" Regulator Start and Stop in Slot 0"},null,null,null,null,null,"EXT.","by SPI"]
[null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"B43","v":"Yes"},"Yes","Yes",null,null,null,null,null,"VPRE","EXT."]
[null,null,null,null,null,null,null,"V OTP",null,{"$f":"B13","v":" 3.3V"},{"$f":"B24","v":" 5.00V"},{"$f":"B33","v":" 0.825V"},{"$f":"B44","v":" 2.3V"},{"$f":"B55","v":" 1.8V"},{"$f":"B60","v":" 3.3V"},null,null,null,null,null,"BUCK3","VPRE"]
[null,null,null,null,null,null,null,"V after config (enable/slot)",null,{"$f":"J3","v":" 3.3V"},{"$f":"IF(EXACT($B$23,\"Yes\"),K3,J3)","v":" 5.00V"},{"$f":"SUBSTITUTE(L3,\"V\",\"\")","v":" 0.825"},{"$f":"IF(AND(EXACT(M2,\"Yes\"),M7<=6),M3,\"0V\")","v":" 2.3V"},{"$f":"IF(AND(EXACT(N2,\"Yes\"),N7<=6),N3,\"0V\")","v":" 1.8V"}," 3.3V",null,{"$f":"J15","v":" 3.3V"},1.6,null,null,"LDO1"]
[null,null,null,null,null,null,null,"V Number",null,{"$f":"ROUND(VALUE(SUBSTITUTE(J4,\"V\",\"\")),1)","v":3.3},{"$f":"ROUND(VALUE(SUBSTITUTE(K4,\"V\",\"\")),1)","v":5},{"$f":"ROUND(VALUE(SUBSTITUTE(L4,\"V\",\"\")),1)","v":0.8},{"$f":"ROUND(VALUE(SUBSTITUTE(M4,\"V\",\"\")),1)","v":2.2999999999999998},1.8,3.3,null,{"$f":"ROUND(VALUE(SUBSTITUTE(Q4,\"V\",\"\")),1)","v":3.3},{"$f":"ROUND(VALUE(SUBSTITUTE(R4,\"V\",\"\")),1)","v":1.6},null,null,"LDO2"]
[null,null,null,null,null,null,null,"SR",null,null,null,{"$f":"VALUE(LEFT($B$41,5))","v":7.81},{"$f":"VALUE(LEFT(B53,5))","v":10.4},{"$f":"N8/1","v":1.8},{"$f":"O8/1","v":3.1999999999999997}]
[null,null,null,null,null,null,null,"Slot",null,"p","b",{"$f":"IF(ISNUMBER(VALUE(RIGHT(L1,1))),VALUE(RIGHT(L1,1)),10)","v":3},{"$f":"IF(ISNUMBER(VALUE(RIGHT(M1,1))),VALUE(RIGHT(M1,1)),10)","v":0},{"$f":"IF(ISNUMBER(VALUE(RIGHT(N1,1))),VALUE(RIGHT(N1,1)),10)","v":2},{"$f":"IF(ISNUMBER(VALUE(RIGHT(O1,1))),VALUE(RIGHT(O1,1)),10)","v":0}]
[null,null,null,null,null,null,null,"V final",null,{"$f":"J5","v":3.3},{"$f":"IF(K5=0,0,K5-0.1*COUNTIF($J$5:J5,K5)-0.1*COUNTIF($J$8:J8,K5-0.1*COUNTIF($J$5:J5,K5)))","v":5},{"$f":"IF(L5=0,0,L5-0.1*COUNTIF($J$5:K5,L5)-0.1*COUNTIF($J$8:K8,L5-0.1*COUNTIF($J$5:K5,L5)))","v":0.8},{"$f":"IF(M5=0,0,M5-0.1*COUNTIF($J$5:L5,M5)-0.1*COUNTIF($J$8:L8,M5-0.1*COUNTIF($J$5:L5,M5)))","v":2.2999999999999998},{"$f":"IF(N5=0,0,N5-0.1*COUNTIF($J$5:M5,N5)-0.1*COUNTIF($J$8:M8,N5-0.1*COUNTIF($J$5:M5,N5)))","v":1.8},{"$f":"IF(O5=0,0,O5-0.1*COUNTIF($J$5:N5,O5)-0.1*COUNTIF($J$8:N8,O5-0.1*COUNTIF($J$5:N5,O5)))","v":3.1999999999999997},null,{"$f":"IF(Q5=0,0,Q5-0.1*COUNTIF($J$5:O5,Q5)-0.1*COUNTIF($J$8:O8,Q5-0.1*COUNTIF($J$5:O5,Q5)))","v":3.0999999999999996},{"$f":"IF(R5=0,0,R5-0.1*COUNTIF($J$5:O5,R5)-0.1*COUNTIF($J$8:O8,R5-0.1*COUNTIF($J$5:O5,R5)))","v":1.6}]
[null,null,null,null,null,null,null,"SR adjusted",null,null,null,{"$f":"IFERROR(L6*L8/L5,1)","v":7.81},{"$f":"IFERROR(M6*M8/M5,1)","v":10.4},{"$f":"IFERROR(N6*N8/N5,1)","v":1.8},{"$f":"IFERROR(O6*O8/O5,1)","v":3.1030303030303026}]
[null,null,null,null,null,null,null,null,null,null,null,{"$f":"SUBSTITUTE(RIGHT(LEFT(L1,45),7),\")\",\"\")","v":" Slot 3"},{"$f":"SUBSTITUTE(RIGHT(LEFT(M1,45),7),\")\",\"\")","v":" Slot 0"}," Slot 2"," Slot 0"]
["MAIN",null,null,"FAIL SAFE",null,null,"Power sequencing"]
["VPRE",null,null,"VCOREMON",null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,"nb ABIST",{"$f":"COUNTIF(L14:M19,\"ABIST1_Yes\")","v":6}]
["Output voltage",{"$f":"RIGHT(OTP_conf_main_reg!G5,LEN(OTP_conf_main_reg!G5)-FIND(\"-\",OTP_conf_main_reg!G5,1))","v":" 3.3V"},null,"Monitoring Voltage",{"$f":"RIGHT(OTP_conf_failsafe_reg!E5,LEN(OTP_conf_failsafe_reg!E5)-FIND(\"-\",OTP_conf_failsafe_reg!E5,1))","v":" 0.825V"}]
["Slope compensation",{"$f":"RIGHT(OTP_conf_main_reg!G7,LEN(OTP_conf_main_reg!G7)-FIND(\"-\",OTP_conf_main_reg!G7,1))","v":" 50mV/µs"},null,"OVTH",{"$f":"RIGHT(OTP_conf_failsafe_reg!I7,LEN(OTP_conf_failsafe_reg!I7)-FIND(\"-\",OTP_conf_failsafe_reg!I7,1))","v":" 104.5%"},null,null,"VCOREMON","BUCK1",{"$f":"B33","v":" 0.825V"},{"$f":"IF(COUNTIF($U$1:$U$2,I14),\"NA\",INDEX($L$10:$O$10,MATCH(I14,$L$21:$O$21,0)))","v":" Slot 3"},{"$f":"\"ABIST1_\"&E54","v":"ABIST1_Yes"},null,null,"Notes:\n- VBOS is set @5.1V to differentiate from regulators on the graph\n- BUCK1/3, LDO1/2 and RSTB may have -0.1V offset to differentiate from other regulators on the graph\n- Timing representation may not be 100% accurate"]
["Current limitation",{"$f":"RIGHT(OTP_conf_main_reg!E9,LEN(OTP_conf_main_reg!E9)-FIND(\"-\",OTP_conf_main_reg!E9,1))","v":" 150mV"},null,"UVTH",{"$f":"RIGHT(OTP_conf_failsafe_reg!I15,LEN(OTP_conf_failsafe_reg!I15)-FIND(\"-\",OTP_conf_failsafe_reg!I15,1))","v":" 95.5%"},null,null,"VDDIOMON",{"$f":"IF(COUNTIF($U$2:$U$5,B70),B70,U1)","v":"LDO2"},{"$f":"IF(I15=\"EXT.\",\"0.8V\",OFFSET($I$3,0,MATCH(I15,$J$21:$O$21,0)))","v":" 3.3V"}," Slot 0","ABIST1_Yes"]
["High Side slew rate",{"$f":"RIGHT(OTP_conf_main_reg!K9,LEN(OTP_conf_main_reg!K9)-FIND(\"-\",OTP_conf_main_reg!K9,1))","v":" PU/PD/900mA"},null,"OV_DGLT",{"$f":"RIGHT(OTP_conf_failsafe_reg!I29,LEN(OTP_conf_failsafe_reg!I29)-FIND(\"-\",OTP_conf_failsafe_reg!I29,1))","v":" 25µs"},null,null,"VMON1","BUCK3",{"$f":"IF(I16=\"EXT.\",\"0.8V\",OFFSET($I$3,0,MATCH(I16,$J$21:$O$21,0)))","v":" 2.3V"}," Slot 0","ABIST1_Yes"]
["Low Side slew rate",{"$f":"RIGHT(OTP_conf_main_reg!I9,LEN(OTP_conf_main_reg!I9)-FIND(\"-\",OTP_conf_main_reg!I9,1))","v":" PU/PD/900mA"},null,"UV_DGLT",{"$f":"RIGHT(OTP_conf_failsafe_reg!G29,LEN(OTP_conf_failsafe_reg!G29)-FIND(\"-\",OTP_conf_failsafe_reg!G29,1))","v":" 25µs"},null,null,"VMON2","VPRE"," 3.3V","NA","ABIST1_Yes",null,null,null,null,null,null,null,null,{"$f":"L14","v":"ABIST1_Yes"},{"$f":"L15","v":"ABIST1_Yes"},{"$f":"L16","v":"ABIST1_Yes"},{"$f":"L17","v":"ABIST1_Yes"},{"$f":"L18","v":"ABIST1_Yes"},{"$f":"L19","v":"ABIST1_Yes"}]
["Switching frequency",{"$f":"IF(OTP_conf_main_reg!I43=\"1 - CLK2\",RIGHT(OTP_conf_main_reg!J37,LEN(OTP_conf_main_reg!J37)-FIND(\"=\",OTP_conf_main_reg!J37,1)),RIGHT(OTP_conf_main_reg!K43,LEN(OTP_conf_main_reg!K43)-FIND(\"=\",OTP_conf_main_reg!K43,1)))","v":"455KHz"},null,"SVS_CLAMP",{"$f":"RIGHT(OTP_conf_failsafe_reg!H9,LEN(OTP_conf_failsafe_reg!H9)-FIND(\"-\",OTP_conf_failsafe_reg!H9,1))","v":" No SVS"},null,null,"VMON3","LDO1"," 1.8V"," Slot 2","ABIST1_Yes",null,null,null,null,null,null,null,null,{"$f":"I14","v":"BUCK1"},{"$f":"I15","v":"LDO2"},{"$f":"I16","v":"BUCK3"},{"$f":"I17","v":"VPRE"},{"$f":"I18","v":"LDO1"},{"$f":"I19","v":"EXT."}]
["Phase shifting",{"$f":"RIGHT(OTP_conf_main_reg!G37,LEN(OTP_conf_main_reg!G37)-FIND(\"-\",OTP_conf_main_reg!G37,1))","v":" delay 0"},null,"VDDIOMON",null,null,null,"VMON4","EXT.","0.8V","NA","ABIST1_Yes",null,null,null,null,null,null,null,null,{"$f":"IFERROR(INDEX($J$8:$O$8,MATCH(U18,$J$21:$O$21,0)),0)","v":0.8},3.1999999999999997,2.2999999999999998,3.3,1.8,0]
["Turn OFF delay",{"$f":"RIGHT(OTP_conf_main_reg!H47,LEN(OTP_conf_main_reg!H47)-FIND(\"-\",OTP_conf_main_reg!H47,1))","v":" 250µs"},null,"Monitoring Voltage",{"$f":"RIGHT(OTP_conf_failsafe_reg!G9,LEN(OTP_conf_failsafe_reg!G9)-FIND(\"-\",OTP_conf_failsafe_reg!G9,1))","v":" 3.3V"},null,null,null,null,null,null,null,null,null,null,null,null,null,null,null,{"$f":"IFERROR(INDEX($L$10:$O$10,MATCH(U18,$L$21:$O$21,0)),\"NA\")","v":" Slot 3"},{"$f":"IFERROR(INDEX($L$10:$O$10,MATCH(V18,$L$21:$O$21,0)),\"NA\")","v":" Slot 0"}," Slot 0","NA"," Slot 2","NA"]
["VPRE mode",{"$f":"RIGHT(OTP_conf_main_reg!G11,LEN(OTP_conf_main_reg!G11)-FIND(\"-\",OTP_conf_main_reg!G11,1))","v":" Force PWM"},null,"OVTH",{"$f":"RIGHT(OTP_conf_failsafe_reg!E7,LEN(OTP_conf_failsafe_reg!E7)-FIND(\"-\",OTP_conf_failsafe_reg!E7,1))","v":" 104.5%"},null,"Time","VSUP","VBOS","VPRE","VBOOST","BUCK1","BUCK3","LDO1","LDO2","LBIST","RSTB","ABIST",null,"ABIST_Temp","RSTB_VCORE","RSTB_VDDIO","RSTB_VMON1","RSTB_VMON2","RSTB_VMON3","RSTB_VMON4"]
["VBOOST",null,null,"UVTH",{"$f":"RIGHT(OTP_conf_failsafe_reg!E15,LEN(OTP_conf_failsafe_reg!E15)-FIND(\"-\",OTP_conf_failsafe_reg!E15,1))","v":" 95.5%"},null,0,0,0,0,0,0,0,0,0,0,{"$f":"IF(T22>=0.2+$AF$12/6+$H$1,$Q$8,0)","v":0},{"$f":"IF(AND(T22>0,T22<0.2+$AF$12/6),$R$8,0)","v":0},null,0,{"$f":"IF(OR(U$17=\"ABIST1_No\",COUNTIF($V$2,U$18)),1,IF(AND(U$19<>0,OFFSET($I22,0,MATCH(U$18,$J$21:$O$21,0))=U$19),1,0))","v":0},{"$f":"IF(OR(V$17=\"ABIST1_No\",COUNTIF($V$2,V$18)),1,IF(AND(V$19<>0,OFFSET($I22,0,MATCH(V$18,$J$21:$O$21,0))=V$19),1,0))","v":0},0,0,0,1]
["Enabled",{"$f":"IF(RIGHT(OTP_conf_main_reg!E13,LEN(OTP_conf_main_reg!E13)-FIND(\"-\",OTP_conf_main_reg!E13,1))=\" enabled\", \"Yes\",\"No\")","v":"Yes"},null,"OV_DGLT",{"$f":"RIGHT(OTP_conf_failsafe_reg!L29,LEN(OTP_conf_failsafe_reg!L29)-FIND(\"-\",OTP_conf_failsafe_reg!L29,1))","v":" 25µs"},null,{"$f":"G22+0.05","v":0.05},{"$f":"H24/2","v":2.4500000000000002},0,0,0,0,0,0,0,0,{"$f":"IF(T23>=0.2+$AF$12/6+$H$1,$Q$8,0)","v":0},0,null,{"$f":"T22+IF(INT(AND(U23:Z23,P22=\"DONE\"))=0,0,G23-G22)","v":0},{"$f":"IF(OR(U$17=\"ABIST1_No\",COUNTIF($V$2,U$18)),1,IF(AND(U$19<>0,OFFSET($I23,0,MATCH(U$18,$J$21:$O$21,0))=U$19),1,0))","v":0},0,0,0,0,1]
["Output voltage",{"$f":"RIGHT(OTP_conf_main_reg!I11,LEN(OTP_conf_main_reg!I11)-FIND(\"-\",OTP_conf_main_reg!I11,1))","v":" 5.00V"},null,"UV_DGLT",{"$f":"RIGHT(OTP_conf_failsafe_reg!J29,LEN(OTP_conf_failsafe_reg!J29)-FIND(\"-\",OTP_conf_failsafe_reg!J29,1))","v":" 25µs"},null,{"$f":"G23+0.05","v":0.1},{"$f":"VALUE((LEFT(B69,4)))","v":4.9000000000000004},{"$f":"$I$44/21","v":0.24285714285714283},0,0,0,0,0,0,0,0,0,null,{"$f":"T23+IF(INT(AND(U24:Z24,P23=\"DONE\"))=0,0,G24-G23)","v":0},0,0,0,0,0,1]
["Slope compensation",{"$f":"RIGHT(OTP_conf_main_reg!H13,LEN(OTP_conf_main_reg!H13)-FIND(\"-\",OTP_conf_main_reg!H13,1))","v":" 125mV/µs"},null,"VMON1",null,null,0.15000000000000002,{"$f":"H24*1.5","v":7.3500000000000005},{"$f":"$I$44/21+I24","v":0.48571428571428565},0,0,0,0,0,0,0,0,0,null,0,0,0,0,0,0,1]
["Slew rate",{"$f":"RIGHT(OTP_conf_main_reg!K15,LEN(OTP_conf_main_reg!K15)-FIND(\"-\",OTP_conf_main_reg!K15,1))","v":" 500V/µs"},null,"OVTH",{"$f":"RIGHT(OTP_conf_failsafe_reg!I11,LEN(OTP_conf_failsafe_reg!I11)-FIND(\"-\",OTP_conf_failsafe_reg!I11,1))","v":" 105%"},null,0.2,{"$f":"IF(H25+H23<12,H25+H23,12)","v":9.8000000000000007},0.72857142857142843,0,0,0,0,0,0,0,0,0,null,0,0,0,0,0,0,1]
["Compensation resistor",{"$f":"RIGHT(OTP_conf_main_reg!E15,LEN(OTP_conf_main_reg!E15)-FIND(\"-\",OTP_conf_main_reg!E15,1))","v":" 750kohms"},null,"UVTH",{"$f":"RIGHT(OTP_conf_failsafe_reg!I17,LEN(OTP_conf_failsafe_reg!I17)-FIND(\"-\",OTP_conf_failsafe_reg!I17,1))","v":" 95%"},null,0.25,12,0.97142857142857131,0,0,0,0,0,0,0,0,0,null,0,0,0,0,0,0,1]
["Compensation capacitor",{"$f":"RIGHT(OTP_conf_main_reg!G15,LEN(OTP_conf_main_reg!G15)-FIND(\"-\",OTP_conf_main_reg!G15,1))","v":" 125pF"},null,"OV_DGLT",{"$f":"RIGHT(OTP_conf_failsafe_reg!L31,LEN(OTP_conf_failsafe_reg!L31)-FIND(\"-\",OTP_conf_failsafe_reg!L31,1))","v":" 25µs"},null,0.3,{"$f":"H27","v":12},1.2142857142857142,0,0,0,0,0,0,0,0,0,null,0,0,0,0,0,0,1]
["Switching frequency",{"$f":"IF(OTP_conf_main_reg!H43=\"1 - CLK2\",RIGHT(OTP_conf_main_reg!J37,LEN(OTP_conf_main_reg!J37)-FIND(\"=\",OTP_conf_main_reg!J37,1)),RIGHT(OTP_conf_main_reg!K43,LEN(OTP_conf_main_reg!K43)-FIND(\"=\",OTP_conf_main_reg!K43,1)))","v":"2.22MHz"},null,"UV_DGLT",{"$f":"RIGHT(OTP_conf_failsafe_reg!J31,LEN(OTP_conf_failsafe_reg!J31)-FIND(\"-\",OTP_conf_failsafe_reg!J31,1))","v":" 25µs"},null,0.35,{"$f":"H28","v":12},1.4571428571428571,0,0,0,0,0,0,0,0,0,null,0,0,0,0,0,0,1]
["Phase shifting",{"$f":"RIGHT(OTP_conf_main_reg!J39,LEN(OTP_conf_main_reg!J39)-FIND(\"-\",OTP_conf_main_reg!J39,1))","v":" delay 0"},null,"VMON2",null,null,0.39999999999999997,12,1.7,0,0,0,0,0,0,0,0,0,null,0,0,0,0,0,0,1]
["Behavior in case of TSD",{"$f":"RIGHT(OTP_conf_main_reg!G45,LEN(OTP_conf_main_reg!G45)-FIND(\"-\",OTP_conf_main_reg!G45,1))","v":" BOOST Shutdown"},null,"OVTH",{"$f":"RIGHT(OTP_conf_failsafe_reg!E11,LEN(OTP_conf_failsafe_reg!E11)-FIND(\"-\",OTP_conf_failsafe_reg!E11,1))","v":" 104.5%"},null,0.44999999999999996,12,1.9428571428571428,0,0,0,0,0,0,0,0,0,null,0,0,0,0,0,0,1]
["BUCK1",null,null,"UVTH",{"$f":"RIGHT(OTP_conf_failsafe_reg!E17,LEN(OTP_conf_failsafe_reg!E17)-FIND(\"-\",OTP_conf_failsafe_reg!E17,1))","v":" 95.5%"},null,0.49999999999999994,12,2.1857142857142855,0,0,0,0,0,0,0,0,0,null,0,0,0,0,0,0,1]
["Output voltage",{"$f":"RIGHT(OTP_conf_main_reg!E17,LEN(OTP_conf_main_reg!E17)-FIND(\"-\",OTP_conf_main_reg!E17,1))","v":" 0.825V"},null,"OV_DGLT",{"$f":"RIGHT(OTP_conf_failsafe_reg!L31,LEN(OTP_conf_failsafe_reg!L31)-FIND(\"-\",OTP_conf_failsafe_reg!L31,1))","v":" 25µs"},null,0.54999999999999993,12,2.4285714285714284,0,0,0,0,0,0,0,0,0,null,0,0,0,0,0,0,1]
["Inductor",{"$f":"RIGHT(OTP_conf_main_reg!H19,LEN(OTP_conf_main_reg!H19)-FIND(\"-\",OTP_conf_main_reg!H19,1))","v":" 1µH"},null,"UV_DGLT",{"$f":"RIGHT(OTP_conf_failsafe_reg!J31,LEN(OTP_conf_failsafe_reg!J31)-FIND(\"-\",OTP_conf_failsafe_reg!J31,1))","v":" 25µs"},null,0.6,12,2.6714285714285713,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Current limitation",{"$f":"RIGHT(OTP_conf_main_reg!J19,LEN(OTP_conf_main_reg!J19)-FIND(\"-\",OTP_conf_main_reg!J19,1))","v":" 4.5A"},null,"VMON3",null,null,0.65,12,2.9142857142857141,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Compensation network",{"$f":"RIGHT(OTP_conf_main_reg!H27,LEN(OTP_conf_main_reg!H27)-FIND(\"-\",OTP_conf_main_reg!H27,1))","v":" 65 GM"},null,"OVTH",{"$f":"RIGHT(OTP_conf_failsafe_reg!I13,LEN(OTP_conf_failsafe_reg!I13)-FIND(\"-\",OTP_conf_failsafe_reg!I13,1))","v":" 104.5%"},null,0.70000000000000007,12,3.157142857142857,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Switching frequency",{"$f":"IF(OTP_conf_main_reg!G43=\"1 - CLK2\",RIGHT(OTP_conf_main_reg!J37,LEN(OTP_conf_main_reg!J37)-FIND(\"=\",OTP_conf_main_reg!J37,1)),RIGHT(OTP_conf_main_reg!K43,LEN(OTP_conf_main_reg!K43)-FIND(\"=\",OTP_conf_main_reg!K43,1)))","v":"2.22MHz"},null,"UVTH",{"$f":"RIGHT(OTP_conf_failsafe_reg!I19,LEN(OTP_conf_failsafe_reg!I19)-FIND(\"-\",OTP_conf_failsafe_reg!I19,1))","v":" 95.5%"},null,0.75000000000000011,12,3.4,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Phase shifting",{"$f":"RIGHT(OTP_conf_main_reg!G39,LEN(OTP_conf_main_reg!G39)-FIND(\"-\",OTP_conf_main_reg!G39,1))","v":" delay 6"},null,"OV_DGLT",{"$f":"RIGHT(OTP_conf_failsafe_reg!L31,LEN(OTP_conf_failsafe_reg!L31)-FIND(\"-\",OTP_conf_failsafe_reg!L31,1))","v":" 25µs"},null,0.80000000000000016,12,3.6428571428571428,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Behavior in case of TSD",{"$f":"RIGHT(OTP_conf_main_reg!H45,LEN(OTP_conf_main_reg!H45)-FIND(\"-\",OTP_conf_main_reg!H45,1))","v":" BUCK1 Shutdown"},null,"UV_DGLT",{"$f":"RIGHT(OTP_conf_failsafe_reg!J31,LEN(OTP_conf_failsafe_reg!J31)-FIND(\"-\",OTP_conf_failsafe_reg!J31,1))","v":" 25µs"},null,0.8500000000000002,12,3.8857142857142857,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Power sequencing slot",{"$f":"RIGHT(OTP_conf_main_reg!J31,LEN(OTP_conf_main_reg!J31)-FIND(\"-\",OTP_conf_main_reg!J31,1))","v":" Regulator Start and Stop in Slot 3"},null,"VMON4",null,null,0.90000000000000024,12,4.1285714285714281,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Soft start ramp",{"$f":"RIGHT(OTP_conf_main_reg!E35,LEN(OTP_conf_main_reg!E35)-FIND(\"-\",OTP_conf_main_reg!E35,1))","v":" 7.81mV/µs"},null,"OVTH",{"$f":"RIGHT(OTP_conf_failsafe_reg!E13,LEN(OTP_conf_failsafe_reg!E13)-FIND(\"-\",OTP_conf_failsafe_reg!E13,1))","v":" 104.5%"},null,0.95000000000000029,12,4.371428571428571,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["BUCK3",null,null,"UVTH",{"$f":"RIGHT(OTP_conf_failsafe_reg!E19,LEN(OTP_conf_failsafe_reg!E19)-FIND(\"-\",OTP_conf_failsafe_reg!E19,1))","v":" 95.5%"},null,1.0000000000000002,{"$f":"H40","v":12},4.6142857142857139,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Enabled",{"$f":"IF(RIGHT(OTP_conf_main_reg!E25,LEN(OTP_conf_main_reg!E25)-FIND(\"-\",OTP_conf_main_reg!E25,1))=\" enabled\", \"Yes\",\"No\")","v":"Yes"},null,"OV_DGLT",{"$f":"RIGHT(OTP_conf_failsafe_reg!L31,LEN(OTP_conf_failsafe_reg!L31)-FIND(\"-\",OTP_conf_failsafe_reg!L31,1))","v":" 25µs"},null,1.0500000000000003,{"$f":"H41","v":12},4.8571428571428568,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Output voltage",{"$f":"RIGHT(OTP_conf_main_reg!H25,LEN(OTP_conf_main_reg!H25)-FIND(\"-\",OTP_conf_main_reg!H25,1))","v":" 2.3V"},null,"UV_DGLT",{"$f":"RIGHT(OTP_conf_failsafe_reg!J31,LEN(OTP_conf_failsafe_reg!J31)-FIND(\"-\",OTP_conf_failsafe_reg!J31,1))","v":" 25µs"},null,1.1000000000000003,{"$f":"H43","v":12},5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Inductor",{"$f":"RIGHT(OTP_conf_main_reg!F25,LEN(OTP_conf_main_reg!F25)-FIND(\"-\",OTP_conf_main_reg!F25,1))","v":" 1µH"},null,"PGOOD",null,null,1.1500000000000004,12,{"$f":"I44","v":5.0999999999999996},0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Current limitation",{"$f":"RIGHT(OTP_conf_main_reg!K27,LEN(OTP_conf_main_reg!K27)-FIND(\"-\",OTP_conf_main_reg!K27,1))","v":" 4.5A"},null,"VCOREMON",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!L21,LEN(OTP_conf_failsafe_reg!L21)-FIND(\"-\",OTP_conf_failsafe_reg!L21,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"},null,1.2000000000000004,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Compensation resistor",{"$f":"RIGHT(OTP_conf_main_reg!K23,LEN(OTP_conf_main_reg!K23)-FIND(\"-\",OTP_conf_main_reg!K23,1))","v":" Default"},null,"VDDIOMON",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!K21,LEN(OTP_conf_failsafe_reg!K21)-FIND(\"-\",OTP_conf_failsafe_reg!K21,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"},null,1.2500000000000004,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Gain control",{"$f":"RIGHT(OTP_conf_main_reg!L23,LEN(OTP_conf_main_reg!L23)-FIND(\"-\",OTP_conf_main_reg!L23,1))","v":" Default"},null,"VMON1",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!J21,LEN(OTP_conf_failsafe_reg!J21)-FIND(\"-\",OTP_conf_failsafe_reg!J21,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"},null,1.3000000000000005,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Switching frequency",{"$f":"IF(OTP_conf_main_reg!E43=\"1 - CLK2\",RIGHT(OTP_conf_main_reg!J37,LEN(OTP_conf_main_reg!J37)-FIND(\"=\",OTP_conf_main_reg!J37,1)),RIGHT(OTP_conf_main_reg!K43,LEN(OTP_conf_main_reg!K43)-FIND(\"=\",OTP_conf_main_reg!K43,1)))","v":"2.22MHz"},null,"VMON2",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!I21,LEN(OTP_conf_failsafe_reg!I21)-FIND(\"-\",OTP_conf_failsafe_reg!I21,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"},null,1.3500000000000005,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Phase shifting",{"$f":"RIGHT(OTP_conf_main_reg!G41,LEN(OTP_conf_main_reg!G41)-FIND(\"-\",OTP_conf_main_reg!G41,1))","v":" delay 3"},null,"VMON3",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!H21,LEN(OTP_conf_failsafe_reg!H21)-FIND(\"-\",OTP_conf_failsafe_reg!H21,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"},null,1.4000000000000006,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Behavior in case of TSD",{"$f":"RIGHT(OTP_conf_main_reg!J45,LEN(OTP_conf_main_reg!J45)-FIND(\"-\",OTP_conf_main_reg!J45,1))","v":" BUCK3 Shutdown"},null,"VMON4",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!G21,LEN(OTP_conf_failsafe_reg!G21)-FIND(\"-\",OTP_conf_failsafe_reg!G21,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"},null,1.4500000000000006,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Power sequencing slot",{"$f":"RIGHT(OTP_conf_main_reg!J35,LEN(OTP_conf_main_reg!J35)-FIND(\"-\",OTP_conf_main_reg!J35,1))","v":" Regulator Start and Stop in Slot 0"},null,"RSTB",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!F21,LEN(OTP_conf_failsafe_reg!F21)-FIND(\"-\",OTP_conf_failsafe_reg!F21,1))=\" Assigned\", \"Yes\",\"No\")","v":"No"},null,1.5000000000000007,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Soft start ramp",{"$f":"RIGHT(OTP_conf_main_reg!G35,LEN(OTP_conf_main_reg!G35)-FIND(\"-\",OTP_conf_main_reg!G35,1))","v":" 10.4mV/µs"},null,"ABIST1",null,null,1.5500000000000007,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["LDO1",null,null,"VCOREMON",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!L23,LEN(OTP_conf_failsafe_reg!L23)-FIND(\"-\",OTP_conf_failsafe_reg!L23,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"},null,1.6000000000000008,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Output voltage",{"$f":"RIGHT(OTP_conf_main_reg!J29,LEN(OTP_conf_main_reg!J29)-FIND(\"-\",OTP_conf_main_reg!J29,1))","v":" 1.8V"},null,"VDDIOMON",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!K23,LEN(OTP_conf_failsafe_reg!K23)-FIND(\"-\",OTP_conf_failsafe_reg!K23,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"},null,1.6500000000000008,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Current limitation",{"$f":"RIGHT(OTP_conf_main_reg!I29,LEN(OTP_conf_main_reg!I29)-FIND(\"-\",OTP_conf_main_reg!I29,1))","v":" 400mA"},null,"VMON1",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!J23,LEN(OTP_conf_failsafe_reg!J23)-FIND(\"-\",OTP_conf_failsafe_reg!J23,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"},null,1.7000000000000008,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Behavior in case of TSD",{"$f":"RIGHT(OTP_conf_main_reg!K45,LEN(OTP_conf_main_reg!K45)-FIND(\"-\",OTP_conf_main_reg!K45,1))","v":" LDO1 Shutdown"},null,"VMON2",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!I23,LEN(OTP_conf_failsafe_reg!I23)-FIND(\"-\",OTP_conf_failsafe_reg!I23,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"},null,1.7500000000000009,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Power sequencing slot",{"$f":"RIGHT(OTP_conf_main_reg!J33,LEN(OTP_conf_main_reg!J33)-FIND(\"-\",OTP_conf_main_reg!J33,1))","v":" Regulator Start and Stop in Slot 2"},null,"VMON3",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!H23,LEN(OTP_conf_failsafe_reg!H23)-FIND(\"-\",OTP_conf_failsafe_reg!H23,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"},null,1.8000000000000009,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["LDO2",null,null,"VMON4",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!G23,LEN(OTP_conf_failsafe_reg!G23)-FIND(\"-\",OTP_conf_failsafe_reg!G23,1))=\" Assigned\", \"Yes\",\"No\")","v":"Yes"},null,1.850000000000001,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Output voltage",{"$f":"RIGHT(OTP_conf_main_reg!F29,LEN(OTP_conf_main_reg!F29)-FIND(\"-\",OTP_conf_main_reg!F29,1))","v":" 3.3V"},null,"Safety enable",null,null,1.900000000000001,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Current limitation",{"$f":"RIGHT(OTP_conf_main_reg!E29,LEN(OTP_conf_main_reg!E29)-FIND(\"-\",OTP_conf_main_reg!E29,1))","v":" 400mA"},null,"VMON1",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!L25,LEN(OTP_conf_failsafe_reg!L25)-FIND(\"-\",OTP_conf_failsafe_reg!L25,1))=\" Enabled\", \"Yes\",\"No\")","v":"Yes"},null,1.9500000000000011,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Behavior in case of TSD",{"$f":"RIGHT(OTP_conf_main_reg!L45,LEN(OTP_conf_main_reg!L45)-FIND(\"-\",OTP_conf_main_reg!L45,1))","v":" LDO2 Shutdown"},null,"VMON2",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!K25,LEN(OTP_conf_failsafe_reg!K25)-FIND(\"-\",OTP_conf_failsafe_reg!K25,1))=\" Enabled\", \"Yes\",\"No\")","v":"Yes"},null,2.0000000000000009,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Power sequencing slot",{"$f":"RIGHT(OTP_conf_main_reg!G33,LEN(OTP_conf_main_reg!G33)-FIND(\"-\",OTP_conf_main_reg!G33,1))","v":" Regulator Start and Stop in Slot 0"},null,"VMON3",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!J25,LEN(OTP_conf_failsafe_reg!J25)-FIND(\"-\",OTP_conf_failsafe_reg!J25,1))=\" Enabled\", \"Yes\",\"No\")","v":"Yes"},null,2.0500000000000007,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Other",null,null,"VMON4",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!I25,LEN(OTP_conf_failsafe_reg!I25)-FIND(\"-\",OTP_conf_failsafe_reg!I25,1))=\" Enabled\", \"Yes\",\"No\")","v":"Yes"},null,2.1000000000000005,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Power up/down slot duration",{"$f":"RIGHT(OTP_conf_main_reg!I35,LEN(OTP_conf_main_reg!I35)-FIND(\"-\",OTP_conf_main_reg!I35,1))","v":" 1000µs"},null,"FCCU",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!H25,LEN(OTP_conf_failsafe_reg!H25)-FIND(\"-\",OTP_conf_failsafe_reg!H25,1))=\" Enabled\", \"Yes\",\"No\")","v":"Yes"},null,2.1500000000000004,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["PSYNC",{"$f":"IF(OTP_conf_main_reg!L47=\"1 - Enabled\",RIGHT(OTP_conf_main_reg!K47,LEN(OTP_conf_main_reg!K47)-FIND(\"-\",OTP_conf_main_reg!K47,1)),\"Disabled\")","v":" 2x FS84_QFN48EP"},null,"WATCHDOG",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!E25,LEN(OTP_conf_failsafe_reg!E25)-FIND(\"-\",OTP_conf_failsafe_reg!E25,1))=\" Enabled\", RIGHT(OTP_conf_failsafe_reg!F25,LEN(OTP_conf_failsafe_reg!F25)-FIND(\"-\",OTP_conf_failsafe_reg!F25,1)),\"No\")","v":" Simple WD"},null,2.2000000000000002,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["PLL enabled",{"$f":"IF(RIGHT(OTP_conf_main_reg!J43,LEN(OTP_conf_main_reg!J43)-FIND(\"-\",OTP_conf_main_reg!J43,1))=\" enabled\", \"Yes\",\"No\")","v":"Yes"},null,"FLT_RECOVERY",{"$f":"IF(RIGHT(OTP_conf_failsafe_reg!H27,LEN(OTP_conf_failsafe_reg!H27)-FIND(\"-\",OTP_conf_failsafe_reg!H27,1))=\" Enabled\", \"Yes\",\"No\")","v":"Yes"},null,2.25,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Deep Fail Safe (autoretry)",{"$f":"IF(OTP_conf_main_reg!J47=\"1 - Enabled\",IF(OTP_conf_main_reg!I47=\"1 - Enabled\",\"Infinite\",\"x15\"),\"Disabled\")","v":"Infinite"},null,null,null,null,2.2999999999999998,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["VSUP power-up threshold",{"$f":"RIGHT(OTP_conf_main_reg!L49,LEN(OTP_conf_main_reg!L49)-FIND(\"-\",OTP_conf_main_reg!L49,1))","v":" 4.9V for Vpre < 4.5V"},null,null,null,null,2.3499999999999996,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Regulator assigned to VDDIO",{"$f":"RIGHT(OTP_conf_main_reg!J53,LEN(OTP_conf_main_reg!J53)-6)","v":"LDO2"},null,null,null,null,2.3999999999999995,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
["Device ID",{"$f":"OTP_conf_main_reg!E55","v":"00000001"},null,null,null,null,2.4499999999999993,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
[null,null,null,null,null,null,2.4999999999999991,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
[null,null,null,null,null,null,2.5499999999999989,12,5.0999999999999996,0,0,0,0,0,0,1.6,0,0,null,0,0,0,0,0,0,1]
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[]
["MAIN OTP_REGISTERS"]
["Register  Name","ADDRESS","R/W","Default","BIT7","BIT6","BIT5","BIT4","BIT3","BIT2","BIT1","BIT0","Data_Bin","Data_Hex",null,"in red font, don't touch"]
["OTP_CFG_VPRE_1","14","RW","0000_0000","-","-","VPREV[5:0]"]
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["OTP_CFG_VPRE_2","15","RW","0000_0000","-","-","VPRESC[5:0]"]
[null,null,null,null,0,0,"000101 - 50mV/µs",null,null,null,null,null,{"$f":"CONCATENATE(E7,F7,LEFT(G7,6))","v":"00000101"},{"$f":"\"0x\"&BIN2HEX(M7,2)","v":"0x05"}]
["OTP_CFG_VPRE_3","16","RW","0000_0000","VPREILIM[1:0]",null,"VPRETOFF[1:0]",null,"VPRESRLS[1:0]",null,"VPRESRHS[1:0]"]
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["OTP_CFG_BUCK1_1","1A","RW","0000_0000","VB1V[7:0]"]
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["OTP_CFG_BUCK2_1","1C","RW","0000_0000","VB2V[7:0]"]
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["OTP_CFG_BUCK2_2","1D","RW","0000_0000","-","VB2INDOPT[1:0]",null,"-","VB2SWILIM[1:0]",null,"VB3_CTRL_RC","VB3_CTRL_GM"]
[null,null,null,null,0,"00",null,0,"00",null,"0 - Default","0 - Default",{"$f":"CONCATENATE(E23,LEFT(F23,2),LEFT(H23,1),LEFT(I23,2),LEFT(K23,1),LEFT(L23,1))","v":"00000000"},{"$f":"\"0x\"&BIN2HEX(M23,2)","v":"0x00"}]
["OTP_CFG_BUCK3_1","1E","RW","0000_0000","BUCK3EN","VB3INDOPT[1:0]",null,"VB3V[4:0]"]
[null,null,null,null,"1 - Enabled","00 - 1µH",null,"01110 - 2.3V",null,null,null,null,{"$f":"CONCATENATE(LEFT(E25,1),LEFT(F25,2),LEFT(H25,5))","v":"10001110"},{"$f":"\"0x\"&BIN2HEX(M25,2)","v":"0x8E"}]
["OTP_CFG_BUCK3_2","1F","RW","0000_0000","-",null,null,"VB1GMCOMP[2:0]",null,null,"VB3SWILIM[1:0]"]
[null,null,null,null,"000",null,null,"100 - 65 GM",null,null,"11 - 4.5A",null,{"$f":"CONCATENATE(LEFT(E27,3),LEFT(H27,3),LEFT(K27,2))","v":"00010011"},{"$f":"\"0x\"&BIN2HEX(M27,2)","v":"0x13"}]
["OTP_CFG_LDO","20","RW","0000_0000","LDO2ILIM","LDO2V[2:0]",null,null,"LDO1ILIM","LDO1V[2:0]"]
[null,null,null,null,"0 - 400mA","110 - 3.3V",null,null,"0 - 400mA","011 - 1.8V",null,null,{"$f":"CONCATENATE(LEFT(E29,1),LEFT(F29,3),LEFT(I29,1),LEFT(J29,3))","v":"01100011"},{"$f":"\"0x\"&BIN2HEX(M29,2)","v":"0x63"}]
["OTP_CFG_SEQ_1","21","RW","0000_0000","-","-","-",null,null,"VB1S[2:0]"]
[null,null,null,null,0,0,"000",null,null,"011 - Regulator Start and Stop in Slot 3",null,null,{"$f":"CONCATENATE(E31,F31,LEFT(G31,3),LEFT(J31,3))","v":"00000011"},{"$f":"\"0x\"&BIN2HEX(M31,2)","v":"0x03"}]
["OTP_CFG_SEQ_2","22","RW","0000_0000","-","-","LDO2S[2:0]",null,null,"LDO1S[2:0]"]
[null,null,null,null,0,0,"000 - Regulator Start and Stop in Slot 0",null,null,"010 - Regulator Start and Stop in Slot 2",null,null,{"$f":"CONCATENATE(E33,F33,LEFT(G33,3),LEFT(J33,3))","v":"00000010"},{"$f":"\"0x\"&BIN2HEX(M33,2)","v":"0x02"}]
["OTP_CFG_SEQ_3","23","RW","0000_0000","DVS_BUCK1[1:0]",null,"DVS_BUCK3[1:0]",null,"Tslot","VB3S[2:0]"]
[null,null,null,null,"00 - 7.81mV/µs",null,"00 - 10.4mV/µs",null,"1 - 1000µs","000 - Regulator Start and Stop in Slot 0",null,null,{"$f":"CONCATENATE(,LEFT(E35,2),LEFT(G35,2),,LEFT(I35,1),LEFT(J35,3))","v":"00001000"},{"$f":"\"0x\"&BIN2HEX(M35,2)","v":"0x08"}]
["OTP_CFG_CLOCK_1","24","RW","0000_0000","-","-","VPRE_ph[2:0]",null,null,"CLK_DIV2[2:0]"]
[null,null,null,null,0,0,"000 - delay 0",null,null,"100 - divide by 44 - CLK2=455KHz",null,null,{"$f":"CONCATENATE(E37,F37,LEFT(G37,3),LEFT(J37,3))","v":"00000100"},{"$f":"\"0x\"&BIN2HEX(M37,2)","v":"0x04"}]
["OTP_CFG_CLOCK_2","25","RW","0000_0000","-","-","BUCK1_ph[2:0]",null,null,"VBST_ph[2:0]"]
[null,null,null,null,0,0,"110 - delay 6",null,null,"000 - delay 0",null,null,{"$f":"CONCATENATE(E39,F39,LEFT(G39,3),LEFT(J39,3))","v":"00110000"},{"$f":"\"0x\"&BIN2HEX(M39,2)","v":"0x30"}]
["OTP_CFG_CLOCK_3","26","RW","0000_0000","-","-","BUCK3_ph[2:0]",null,null,"-"]
[null,null,null,null,0,0,"011 - delay 3",null,null,"000",null,null,{"$f":"CONCATENATE(E41,F41,LEFT(G41,3),LEFT(J41,3))","v":"00011000"},{"$f":"\"0x\"&BIN2HEX(M41,2)","v":"0x18"}]
["OTP_CFG_CLOCK_4","27","RW","0000_0000","BUCK3_clk_sel","-","BUCK1_clk_sel","VBST_clk_sel","VPRE_clk_sel","PLL_sel","CLK_DIV1[1:0]"]
[null,null,null,null,"0 - CLK1",0,"0 - CLK1","0 - CLK1","1 - CLK2","1 - Enabled","10 - divide by 9  - CLK1=2.22MHz",null,{"$f":"CONCATENATE(LEFT(E43,1),LEFT(F43,1),LEFT(G43,1),LEFT(H43,1),LEFT(I43,1),LEFT(J43,1),LEFT(K43,2))","v":"00001110"},{"$f":"\"0x\"&BIN2HEX(M43,2)","v":"0x0E"}]
["OTP_CFG_SM_1","28","RW","0000_0000","-","-","conf_tsd[5:0]"]
[null,null,null,null,0,0,"0 - BOOST Shutdown","0 - BUCK1 Shutdown",0,"0 - BUCK3 Shutdown","0 - LDO1 Shutdown","0 - LDO2 Shutdown",{"$f":"CONCATENATE(E45,F45,LEFT(G45,1),LEFT(H45,1),LEFT(I45,1),LEFT(J45,1),LEFT(K45,1),LEFT(L45,1))","v":"00000000"},{"$f":"\"0x\"&BIN2HEX(M45,2)","v":"0x00"}]
["OTP_CFG_SM_2","29","RW","0000_0000","otp_SPARE1[2:0",null,null,"VPRE_off_dly","Autoretry_infinite","Autoretry_en","PSYNC_CFG","PSYNC_EN"]
[null,null,null,null,"000",null,null,"0 - 250µs","1 - Enabled","1 - Enabled","0 - 2x FS84_QFN48EP","1 - Enabled",{"$f":"CONCATENATE(E47,LEFT(H47,1),LEFT(I47,1),LEFT(J47,1),LEFT(K47,1),LEFT(L47,1))","v":"00001101"},{"$f":"\"0x\"&BIN2HEX(M47,2)","v":"0x0D"}]
["OTP_CFG_VSUP_UV","2A","RW","0000_0000","otp_SPARE2[6:0]",null,null,null,null,null,null,"VSUPCFG"]
[null,null,null,null,"0000000",null,null,null,null,null,null,"0 - 4.9V for Vpre < 4.5V",{"$f":"CONCATENATE(E49,LEFT(L49,1))","v":"00000000"},{"$f":"\"0x\"&BIN2HEX(M49,2)","v":"0x00"}]
["OTP_CFG_I2C","2B","RW","0000_0000","-","-","-","-","-"]
[null,null,null,null,0,0,0,0,"0000",null,null,null,{"$f":"CONCATENATE(E51,F51,G51,H51,LEFT(I51,4))","v":"00000000"},{"$f":"\"0x\"&BIN2HEX(M51,2)","v":"0x00"}]
["OTP_CFG_OV","2C","RW","0000_0000","-","-","-","-","-","VDDIO_REG_ASSIGN[2:0]"]
[null,null,null,null,0,0,0,0,0,"011 - LDO2",null,null,{"$f":"CONCATENATE(E53,F53,G53,H53,I53,LEFT(J53,3))","v":"00000011"},{"$f":"\"0x\"&BIN2HEX(M53,2)","v":"0x03"}]
["OTP_CFG_DEVID","2D","RW","0000_0000","DeviceID[7:0]"]
[null,null,null,null,"00000001",null,null,null,null,null,null,null,{"$f":"E55","v":"00000001"},{"$f":"\"0x\"&BIN2HEX(M55,2)","v":"0x01"}]
["OTP_M_S1_CRC_LSB","2E","RW","0000_0000","OTP_M_S1_CRC_LSB[7:0]"]
[null,null,null,null,"Automatically filled in by Sidence IP",null,null,null,null,null,null,null,"00000000",{"$f":"\"0x\"&BIN2HEX(M57,2)","v":"0x00"}]
["OTP_M_S1_CRC_MSB","2F","RW","0000_0000","OTP_M_S1_CRC_MSB[7:0]"]
[null,null,null,null,"Automatically filled in by Sidence IP",null,null,null,null,null,null,null,"00000000",{"$f":"\"0x\"&BIN2HEX(M59,2)","v":"0x00"}]

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["Bit name",null,"Bit description","Comments"]
["VpreV[5:0]",null,"VPRE output voltage"]
[null,{"$f":"LEFT(C3,LEN(C3)-(LEN(C3)-FIND(\"-\",C3,1))-2)","v":"001111"},"001111 - 3.3V"]
[null,{"$f":"LEFT(C4,LEN(C4)-(LEN(C4)-FIND(\"-\",C4,1))-2)","v":"010100"},"010100 - 3.8V"]
[null,"010111","010111 - 4.1V"]
[null,"100000","100000 - 5.0V"]
["VPRESC[5:0]",null,"VPRE slope compensation"]
[null,"000100","000100 - 40mV/µs"]
[null,"000101","000101 - 50mV/µs"]
[null,"000110","000110 - 60mV/µs"]
[null,"000111","000111 - 70mV/µs"]
[null,"001000","001000 - 80mV/µs"]
[null,"001001","001001 - 90mV/µs"]
[null,"001010","001010 - 100mV/µs"]
[null,"001110","001110 - 140mV/µs"]
[null,"010001","010001 - 170mV/µs"]
[null,"010100","010100 - 200mV/µs"]
[null,"011000","011000 - 240mV/µs"]
["VPREILIM[1:0]",null,"VPRE current limitation threshold"]
[null,"00","00 - 50mV"]
[null,"01","01 - 80mV"]
[null,"10","10 - 120mV"]
[null,"11","11 - 150mV"]
["VPRETOFF[1:0]",null,"VPRE minimum OFF time"]
[null,"10","10 - 40ns"]
["VPRESRLS[1:0]",null,"VPRE Low Side slew rate control"]
[null,"11","11 - PU/PD/900mA"]
["VPRESRHS[1:0]",null,"VPRE High Side slew rate control"]
[null,"00","00 - PU/PD/130mA"]
[null,"01","01 - PU/PD/260mA"]
[null,"10","10 - PU/PD/520mA"]
[null,"11","11 - PU/PD/900mA"]
["VPRE_MODE",null,"VPRE mode"]
[null,{"$f":"LEFT(C34,LEN(C34)-(LEN(C34)-FIND(\"-\",C34,1))-2)","v":"0"},"0 - Force PWM","Force PWM for 455kHz"]
[null,"1","1 - APS","Automatic Pulse Skipping for 2.2MHz"]
["VBSTV[3:0]",null,"VBOOST output voltage"]
[null,"0110","0110 - 5.00V"]
[null,"1101","1101 - 5.74V"]
["BOOSTEN",null,"BOOST enable"]
[null,"0","0 - Disabled"]
[null,"1","1 - Enabled"]
["VBSTTONTIME[1:0]",null,"BOOST minimum ON time"]
[null,"00","00 - 60ns"]
[null,"01","01 - 50ns"]
["VBSTSC[4:0]",null,"VBOOST slope compensation"]
[null,"00110","00110 - 160mV/µs"]
[null,"01100","01100 - 125mV/µs"]
[null,"01110","01110 - 79mV/µs"]
["VBSTRCOMP[1:0]",null,"VBOOST Compensation Network Resistor Rcomp"]
[null,"00","00 - 750kohms","Default value recommended"]
[null,"01","01 - 500Kohms"]
["VBSTCCOMP[1:0]",null,"VBOOST Compensation Network Capacitor Ccomp"]
[null,"00","00 - 125pF"]
["VBSTILIM[1:0]",null,"VBOOST current limitation"]
[null,"01","01 - 2A"]
["VBSTSR[1:0]",null,"VBOOST Low Side slew rate control"]
[null,"10","10 - 300V/µs"]
[null,"11","11 - 500V/µs"]
["VB1V[7:0]",null,"VBUCK1 output voltage"]
[null,"01000000","01000000 - 0.8V"]
[null,"01000100","01000100 - 0.825V"]
[null,{"$f":"LEFT(C62,LEN(C62)-(LEN(C62)-FIND(\"-\",C62,1))-2)","v":"01001000"},"01001000 - 0.85V"]
[null,"01010000","01010000 - 0.9V"]
[null,"01011000","01011000 - 0.95V"]
[null,{"$f":"LEFT(C65,LEN(C65)-(LEN(C65)-FIND(\"-\",C65,1))-2)","v":"01011100"},"01011100 - 0.975V"]
[null,"01100000","01100000 - 1.0V"]
[null,"01100100","01100100 - 1.025V"]
[null,"01100101","01100101 - 1.03125V"]
[null,"01101100","01101100 - 1.075V"]
[null,"01101110","01101110 - 1.0875V"]
[null,"01101111","01101111 - 1.09375V"]
[null,"01110000","01110000 - 1.1V"]
[null,{"$f":"LEFT(C73,LEN(C73)-(LEN(C73)-FIND(\"-\",C73,1))-2)","v":"01110011"},"01110011 - 1.11875V"]
[null,"01110110","01110110 - 1.1375V"]
[null,"10000000","10000000 - 1.2V"]
[null,"10001000","10001000 - 1.25V"]
[null,{"$f":"LEFT(C77,LEN(C77)-(LEN(C77)-FIND(\"-\",C77,1))-2)","v":"10010000"},"10010000 - 1.3V"]
[null,"10011000","10011000 - 1.35V"]
[null,"10100000","10100000 - 1.4V"]
[null,"10110000","10110000 - 1.5V"]
[null,"10110001","10110001 - 1.8V"]
["VB1INDOPT[1:0]",null,"BUCK1 inductor selection","Scale the slope compensation and the Zero Cross Detection according to inductor value"]
[null,"00","00 - 1µH"]
[null,"01","01 - 0.47µH"]
[null,"10","10 - 1.5µH"]
["VB1SWILIM[1:0]",null,"VBUCK1 current limitation "]
[null,"01","01 - 2.6A"]
[null,"11","11 - 4.5A"]
["VB3_CTRL_RC",null,"BUCK3 Compensation Resistor"]
[null,"0","0 - Default","Only \"Default\" configuration to use with L value in the spec (from 0.47µH to 1.5µH)"]
["VB3_CTRL_GM",null,"BUCK3 Gain control"]
[null,"0","0 - Default","Only \"Default\" configuration to use with L value in the spec (from 0.47µH to 1.5µH)"]
["BUCK3EN",null,"BUCK3 enable"]
[null,"0","0 - Disabled"]
[null,"1","1 - Enabled"]
["VB3INDOPT[1:0]",null,"BUCK3 inductor selection","Scale the slope compensation and the Zero Cross Detection according to inductor value"]
[null,"00","00 - 1µH"]
[null,"01","01 - 0.47µH"]
[null,"10","10 - 1.5µH"]
["VB3V[4:0]",null,"VBUCK3 output voltage"]
[null,"00000","00000 - 1.0V"]
[null,"00001","00001 - 1.1V"]
[null,"00010","00010 - 1.2V"]
[null,"00011","00011 - 1.25V"]
[null,"00100","00100 - 1.3V"]
[null,"00101","00101 - 1.35V"]
[null,"00110","00110 - 1.5V"]
[null,"00111","00111 - 1.6V"]
[null,"01000","01000 - 1.8V"]
[null,{"$f":"LEFT(C110,LEN(C110)-(LEN(C110)-FIND(\"-\",C110,1))-2)","v":"01110"},"01110 - 2.3V"]
[null,"10000","10000 - 2.5V"]
[null,"10001","10001 - 2.8V"]
[null,"10101","10101 - 3.3V"]
["VB1GMCOMP[2:0]",null,"BUCK1 Compensation Network"]
[null,"001","001 - 16.25 GM","Decrease GM to reduce the regulation bandwidth and increase the Phase and Gain margin but transient performance may be degraded."]
[null,"010","010 - 32.5 GM"]
[null,"011","011 - 48.75 GM","Defaut GM to use. Will  be stable and will cover most of the use cases with typical output capacitor."]
[null,"100","100 - 65 GM","Increase GM to enlarge the regulation bandwidth and improve transient performance but the Phase and Gain margin may be degraded with typical output capacitor. High output capacitor value reduces the regulation loop bandwidth. Since the compensation network is integrated, increasing the GM helps to improve the Phase Margin by enlarging the bandwidth."]
[null,"101","101 - 81.25 GM"]
[null,"110","110 - 97.5 GM"]
["VB3SWILIM[1:0]",null,"VBUCK3 current limitation "]
[null,"01","01 - 2.6A"]
[null,"11","11 - 4.5A"]
["LDO2ILIM",null,"VLDO2 current limitation "]
[null,"0","0 - 400mA","Need a drop out(Vin - Vout) > 1V"]
[null,"1","1 - 150mA","Need a drop out (Vin - Vout) > 0.5V"]
["LDO2V[2:0]",null,"VLDO2 output voltage"]
[null,"000","000 - 1.1V"]
[null,"001","001 - 1.2V"]
[null,"010","010 - 1.6V"]
[null,"011","011 - 1.8V"]
[null,"100","100 - 2.5V"]
[null,"101","101 - 2.8V"]
[null,"110","110 - 3.3V"]
[null,"111","111 - 5.0V"]
["LDO1ILIM",null,"VLDO1 current limitation "]
[null,"0","0 - 400mA","Need a drop out >1V"]
[null,"1","1 - 150mA","Need a drop out >0.5V"]
["LDO1V[2:0]",null,"VLDO1 output voltage"]
[null,"000","000 - 1.1V"]
[null,"001","001 - 1.2V"]
[null,"010","010 - 1.6V"]
[null,"011","011 - 1.8V"]
[null,"100","100 - 2.5V"]
[null,"101","101 - 2.8V"]
[null,"110","110 - 3.3V"]
[null,"111","111 - 5.0V"]
["VB1S[2:0]",null,"BUCK1 sequencing slot"]
[null,"000","000 - Regulator Start and Stop in Slot 0"]
[null,"001","001 - Regulator Start and Stop in Slot 1"]
[null,"010","010 - Regulator Start and Stop in Slot 2"]
[null,"011","011 - Regulator Start and Stop in Slot 3"]
[null,"100","100 - Regulator Start and Stop in Slot 4"]
[null,"101","101 - Regulator Start and Stop in Slot 5"]
[null,"110","110 - Regulator Start and Stop in Slot 6"]
[null,"111","111 - Regulator does not Start (Enabled by SPI)"]
["LDO2S[2:0]",null,"LDO2 sequencing slot"]
[null,{"$f":"LEFT(C158,LEN(C158)-(LEN(C158)-FIND(\"-\",C158,1))-2)","v":"000"},"000 - Regulator Start and Stop in Slot 0"]
[null,"001","001 - Regulator Start and Stop in Slot 1"]
[null,"010","010 - Regulator Start and Stop in Slot 2"]
[null,"011","011 - Regulator Start and Stop in Slot 3"]
[null,"100","100 - Regulator Start and Stop in Slot 4"]
[null,"101","101 - Regulator Start and Stop in Slot 5"]
[null,"110","110 - Regulator Start and Stop in Slot 6"]
[null,"111","111 - Regulator does not Start (Enabled by SPI)"]
["LDO1S[2:0]",null,"LDO1 sequencing slot"]
[null,"000","000 - Regulator Start and Stop in Slot 0"]
[null,"001","001 - Regulator Start and Stop in Slot 1"]
[null,"010","010 - Regulator Start and Stop in Slot 2"]
[null,"011","011 - Regulator Start and Stop in Slot 3"]
[null,"100","100 - Regulator Start and Stop in Slot 4"]
[null,"101","101 - Regulator Start and Stop in Slot 5"]
[null,"110","110 - Regulator Start and Stop in Slot 6"]
[null,"111","111 - Regulator does not Start (Enabled by SPI)"]
["VB3S[2:0]",null,"BUCK3 sequencing slot"]
[null,"000","000 - Regulator Start and Stop in Slot 0"]
[null,"001","001 - Regulator Start and Stop in Slot 1"]
[null,"010","010 - Regulator Start and Stop in Slot 2"]
[null,"011","011 - Regulator Start and Stop in Slot 3"]
[null,"100","100 - Regulator Start and Stop in Slot 4"]
[null,"101","101 - Regulator Start and Stop in Slot 5"]
[null,"110","110 - Regulator Start and Stop in Slot 6"]
[null,"111","111 - Regulator does not Start (Enabled by SPI)"]
["DVS_BUCK1[1:0]",null,"BUCK1 soft start/stop configurability"]
[null,{"$f":"LEFT(C185,LEN(C185)-(LEN(C185)-FIND(\"-\",C185,1))-2)","v":"00"},"00 - 7.81mV/µs"]
[null,"01","01 - 3.13mV/µs"]
[null,"10","10 - 2.60mV/µs"]
[null,"11","11 - 2.23mV/µs"]
["DVS_BUCK3[1:0]",null,"BUCK3 soft start/stop configurability"]
[null,{"$f":"LEFT(C190,LEN(C190)-(LEN(C190)-FIND(\"-\",C190,1))-2)","v":"00"},"00 - 10.4mV/µs"]
[null,"01","01 - 3.47mV/µs"]
[null,"10","10 - 2.60mV/µs"]
[null,"11","11 - 2.08mV/µs"]
["Tslot",null,"Power up/down slot duration"]
[null,{"$f":"LEFT(C195,LEN(C195)-(LEN(C195)-FIND(\"-\",C195,1))-2)","v":"0"},"0 - 250µs"]
[null,"1","1 - 1000µs"]
["VPRE_ph[2:0]",null,"VPRE phase (delay) selection"]
[null,"000","000 - delay 0"]
[null,"001","001 - delay 1"]
[null,"010","010 - delay 2"]
[null,"011","011 - delay 3"]
[null,"100","100 - delay 4"]
[null,"101","101 - delay 5"]
[null,"110","110 - delay 6"]
[null,"111","111 - delay 7"]
["CLK_DIV2[2:0]",null,"Divider 2 setting"]
[null,"000","000 - divide by 8  - CLK2=2.5MHz"]
[null,"001","001 - divide by 10 - CLK2=2MHz"]
[null,"010","010 - divide by 12  - CLK2=1.67MHz"]
[null,"011","011 - divide by 14  - CLK2=1.43MHz"]
[null,"100","100 - divide by 44 - CLK2=455KHz"]
[null,"101","101 - divide by 46  - CLK2=435KHz"]
[null,"110","110 - divide by 48  - CLK2=417KHz"]
[null,"111","111 - divide by 64  - CLK2=312.5KHz"]
["BUCK1_ph[2:0]",null,"BUCK1 phase (delay) selection"]
[null,"000","000 - delay 0"]
[null,"001","001 - delay 1"]
[null,"010","010 - delay 2"]
[null,"011","011 - delay 3"]
[null,"100","100 - delay 4"]
[null,"101","101 - delay 5"]
[null,"110","110 - delay 6"]
[null,"111","111 - delay 7"]
["VBST_ph[2:0]",null,"BOOST phase (delay) selection"]
[null,"000","000 - delay 0"]
[null,"001","001 - delay 1"]
[null,"010","010 - delay 2"]
[null,"011","011 - delay 3"]
[null,"100","100 - delay 4"]
[null,"101","101 - delay 5"]
[null,"110","110 - delay 6"]
[null,"111","111 - delay 7"]
["BUCK3_ph[2:0]",null,"BUCK3 phase (delay) selection"]
[null,"000","000 - delay 0"]
[null,{"$f":"LEFT(C235,LEN(C235)-(LEN(C235)-FIND(\"-\",C235,1))-2)","v":"001"},"001 - delay 1"]
[null,"010","010 - delay 2"]
[null,"011","011 - delay 3"]
[null,"100","100 - delay 4"]
[null,"101","101 - delay 5"]
[null,"110","110 - delay 6"]
[null,"111","111 - delay 7"]
["BUCK3_clk_sel",null,"BUCK3 clock selection"]
[null,"0","0 - CLK1"]
["BUCK1_clk_sel",null,"BUCK1 clock selection"]
[null,"0","0 - CLK1"]
["VBST_clk_sel",null,"BOOST clock selection"]
[null,"0","0 - CLK1"]
["VPRE_clk_sel",null,"VPRE clock selection"]
[null,"0","0 - CLK1"]
[null,"1","1 - CLK2"]
["PLL_sel",null,"PLL enable"]
[null,"0","0 - Disabled"]
[null,"1","1 - Enabled","Enable PLL when FIN is used"]
["CLK_DIV1[1:0]",null,"Divider 1 setting"]
[null,"00","00 - divide by 7 - CLK1=2.85MHz"]
[null,"01","01 - divide by 8 - CLK1=2.5MHz"]
[null,"10","10 - divide by 9  - CLK1=2.22MHz"]
[null,"11","11 - divide by 14  - CLK1=1.43MHz"]
["conf_tsd[0]",null,"LDO2 behavior in case of TSD"]
[null,"0","0 - LDO2 Shutdown"]
[null,"1","1 - LDO2 Shutdown + DFS"]
["conf_tsd[1]",null,"LDO1 behavior in case of TSD"]
[null,"0","0 - LDO1 Shutdown"]
[null,"1","1 - LDO1 Shutdown + DFS"]
["conf_tsd[2]",null,"BUCK3 behavior in case of TSD"]
[null,"0","0 - BUCK3 Shutdown"]
[null,"1","1 - BUCK3 Shutdown + DFS"]
["conf_tsd[4]",null,"BUCK1 behavior in case of TSD"]
[null,"0","0 - BUCK1 Shutdown"]
[null,"1","1 - BUCK1 Shutdown + DFS"]
["conf_tsd[5]",null,"BOOST behavior in case of TSD"]
[null,"0","0 - BOOST Shutdown"]
[null,"1","1 - BOOST Shutdown + DFS"]
["VPRE_off_dly",null,"Delay to turn OFF VPRE at device power down"]
[null,"0","0 - 250µs","Default value"]
[null,"1","1 - 32ms","When FS84_QFN48EP is used with an external PMIC, PSYNC_EN=1 and PSYNC_CFG=1, during power down sequence, FS84_QFN48EP should wait for the external PMIC power down sequence completion before turning OFF VPRE (VPRE is powering the external PMIC).  OTP_VPRE_off_dly bit shall be configured to extend VPRE turn OFF delay from 250 μs default value to 32 ms."]
["Autoretry_infinite",null,"Deep Fail-safe infinite autoretry enable","Need Autoretry_en=1"]
[null,"0","0 - Disabled"]
[null,"1","1 - Enabled","Infinite autoretry from Deep Fail-safe. "]
["Autoretry_en",null,"Deep Fail-safe autoretry enable"]
[null,"0","0 - Disabled","When disabled, Autorety_infinite is ignored"]
[null,"1","1 - Enabled","x15 autoretry from Deep Fail-safe"]
["PSYNC_CFG",null,"Power up synchronization","Need PSYNC_EN=1"]
[null,"0","0 - 2x FS84_QFN48EP","FS84_QFN48EP#1 state machine stops before FS84_QFN48EP#1_VPRE starts and waits for FS84_QFN48EP#2 to synchronize FS84_QFN48EP#2_VPRE start"]
[null,{"$f":"LEFT(C285,LEN(C285)-(LEN(C285)-FIND(\"-\",C285,1))-2)","v":"1"},"1 - 1xFS84_QFN48EP and 1x ext. PMIC","PSYNC pin of FS84_QFN48EP shall be connected to the PGOOD pin of an external PMIC. In this configuration, FS84_QFN48EP state machine stops after VPRE starts and waits for the PGOOD pin of the external PMIC to be released to continue its own power sequencing"]
["PSYNC_EN",null,"Synchronization with 2 devices"]
[null,"0","0 - Disabled","When disabled, PSYNC_CFG is ignored"]
[null,"1","1 - Enabled","When enabled, PSYNC_CFG configuration is used to synchronize 2x devices"]
["VSUP_CFG",null,"VSUP Under Voltage Threshold Configuration"]
[null,"0","0 - 4.9V for Vpre < 4.5V","Recommended for Automotive 12V network. Can be used for VPRE > 4.5V but in this case VPRE cannot regulate 5V when VSUP=4.9V"]
[null,"1","1 - 6.2V for Vpre > 4.5V","Recommended for Truck 24V network"]
["VDDIO_REG_ASSIGN[2:0]",null,"Regulator assigned to VDDIO"]
[null,"000","000 - External regulator"]
[null,"001","001 - VPRE"]
[null,"010","010 - LDO1"]
[null,"011","011 - LDO2"]
[null,"100","100 - BUCK3"]
[null,"101","101 - External regulator"]
[null,"110","110 - External regulator"]
[null,"111","111 - External regulator"]

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[]
["FAIL-SAFE OTP_REGISTERS"]
["Register  Name","ADDRESS","R/W","Default","BIT7","BIT6","BIT5","BIT4","BIT3","BIT2","BIT1","BIT0","Data_Bin","Data_Hex",null,"in red font, don't touch\n"]
["OTP_CFG_UVOV_1","0A","R/W","0000_0000","VCORE_V[7:0]"]
[null,null,null,null,{"$f":"OTP_conf_main_reg!E17","v":"01000100 - 0.825V"},null,null,null,null,null,null,null,{"$f":"LEFT(E5,8)","v":"01000100"},{"$f":"\"0x\"&BIN2HEX(M5,2)","v":"0x44"}]
["OTP_CFG_UVOV_2","0B","R/W","0000_0000","VDDIOOVTH[3:0]",null,null,null,"VCOREOVTH[3:0]"]
[null,null,null,null,"0000 - 104.5%",null,null,null,"0000 - 104.5%",null,null,null,{"$f":"CONCATENATE(LEFT(E7,4),LEFT(I7,4))","v":"00000000"},{"$f":"\"0x\"&BIN2HEX(M7,2)","v":"0x00"}]
["OTP_CFG_UVOV_3","0C","R/W","0000_0000","-","-","VDDIO_V","VCORE_SVS_CLAMP[4:0]"]
[null,null,null,null,0,0,"0 - 3.3V","00000 - No SVS",null,null,null,null,{"$f":"CONCATENATE(E9,F9,LEFT(G9,1),LEFT(H9,5))","v":"00000000"},{"$f":"\"0x\"&BIN2HEX(M9,2)","v":"0x00"}]
["OTP_CFG_UVOV_4","0D","R/W","0000_0000","VMON2OVTH[3:0]",null,null,null,"VMON1OVTH[3:0]"]
[null,null,null,null,"0000 - 104.5%",null,null,null,"0001 - 105%",null,null,null,{"$f":"CONCATENATE(LEFT(E11,4),LEFT(I11,4))","v":"00000001"},{"$f":"\"0x\"&BIN2HEX(M11,2)","v":"0x01"}]
["OTP_CFG_UVOV_5","0E","R/W","0000_0000","VMON4OVTH[3:0]",null,null,null,"VMON3OVTH[3:0]"]
[null,null,null,null,"0000 - 104.5%",null,null,null,"0000 - 104.5%",null,null,null,{"$f":"CONCATENATE(LEFT(E13,4),LEFT(I13,4))","v":"00000000"},{"$f":"\"0x\"&BIN2HEX(M13,2)","v":"0x00"}]
["OTP_CFG_UVOV_6","0F","R/W","0000_0000","VDDIOUVTH[3:0]",null,null,null,"VCOREUVTH[3:0]"]
[null,null,null,null,"0000 - 95.5%",null,null,null,"0000 - 95.5%",null,null,null,{"$f":"CONCATENATE(LEFT(E15,4),LEFT(I15,4))","v":"00000000"},{"$f":"\"0x\"&BIN2HEX(M15,2)","v":"0x00"}]
["OTP_CFG_UVOV_7","10","R/W","0000_0000","VMON2UVTH[3:0]",null,null,null,"VMON1UVTH[3:0]"]
[null,null,null,null,"0000 - 95.5%",null,null,null,"0001 - 95%",null,null,null,{"$f":"CONCATENATE(LEFT(E17,4),LEFT(I17,4))","v":"00000001"},{"$f":"\"0x\"&BIN2HEX(M17,2)","v":"0x01"}]
["OTP_CFG_UVOV_8","11","R/W","0000_0000","VMON4UVTH[3:0]",null,null,null,"VMON3UVTH[3:0]"]
[null,null,null,null,"0000 - 95.5%",null,null,null,"0000 - 95.5%",null,null,null,{"$f":"CONCATENATE(LEFT(E19,4),LEFT(I19,4))","v":"00000000"},{"$f":"\"0x\"&BIN2HEX(M19,2)","v":"0x00"}]
["OTP_CFG_PGOOD","12","R/W","0000_0000","-","PGOOD_RSTB","PGOOD_VMON4 ","PGOOD_VMON3 ","PGOOD_VMON2 ","PGOOD_VMON1","PGOOD_VDDIO","PGOOD_VCORE"]
[null,null,null,null,0,"0 - Not assigned","1 - Assigned","1 - Assigned","1 - Assigned","1 - Assigned","1 - Assigned","1 - Assigned",{"$f":"CONCATENATE(E21,LEFT(F21,1),LEFT(G21,1),LEFT(H21,1),LEFT(I21,1),LEFT(J21,1),LEFT(K21,1),LEFT(L21,1),)","v":"00111111"},{"$f":"\"0x\"&BIN2HEX(M21,2)","v":"0x3F"}]
["OTP_CFG_ABIST1","13","R/W","0000_0000","otp_SPARE0[1:0]",null,"ABIST1_VMON4 ","ABIST1_VMON3 ","ABIST1_VMON2 ","ABIST1_VMON1","ABIST1_VDDIO","ABIST1_VCORE"]
[null,null,null,null,"00",null,"1 - Assigned","1 - Assigned","1 - Assigned","1 - Assigned","1 - Assigned","1 - Assigned",{"$f":"CONCATENATE(E23,LEFT(G23,1),LEFT(H23,1),LEFT(I23,1),LEFT(J23,1),LEFT(K23,1),LEFT(L23,1),)","v":"00111111"},{"$f":"\"0x\"&BIN2HEX(M23,2)","v":"0x3F"}]
["OTP_CFG_ASIL","14","R/W","0000_0000","WD_DIS","WD_Selection","-","FCCU_EN","VMON4_EN","VMON3_EN","VMON2_EN","VMON1_EN"]
[null,null,null,null,"0 - Enabled","0 - Simple WD",0,"1 - Enabled","1 - Enabled","1 - Enabled","1 - Enabled","1 - Enabled",{"$f":"CONCATENATE(LEFT(E25,1),LEFT(F25,1),LEFT(G25,1),LEFT(H25,1),LEFT(I25,1),LEFT(J25,1),LEFT(K25,1),LEFT(L25,1),)","v":"00011111"},{"$f":"\"0x\"&BIN2HEX(M25,2)","v":"0x1F"}]
["OTP_CFG_I2C","15","R/W","0000_0000","otp_SPARE1[2:0]",null,null,"FLT_RECOVERY_EN","-"]
[null,null,null,null,"000",null,null,"1 - Enabled","0000",null,null,null,{"$f":"CONCATENATE(E27,LEFT(H27,1),LEFT(I27,4))","v":"00010000"},{"$f":"\"0x\"&BIN2HEX(M27,2)","v":"0x10"}]
["OTP_CFG_DGLT_DUR_1",16,null,null,"otp_SPARE2[1:0]",null,"VCORE_UV_DGLT[1:0]",null,"VCORE_OV_DGLT","VDDIO_UV_DGLT[1:0]",null,"VDDIO_OV_DGLT"]
[null,null,null,null,"00",null,"10 - 25µs",null,"0 - 25µs","10 - 25µs",null,"0 - 25µs",{"$f":"CONCATENATE(E29,LEFT(G29,2),LEFT(I29,1),LEFT(J29,2),LEFT(L29,1))","v":"00100100"},{"$f":"\"0x\"&BIN2HEX(M29,2)","v":"0x24"}]
["OTP_CFG_DGLT_DUR_2",17,null,null,"otp_SPARE3[4:0]",null,null,null,null,"VMONx_UV_DGLT[1:0]",null,"VMONx_OV_DGLT"]
[null,null,null,null,"00000",null,null,null,null,"10 - 25µs",null,"0 - 25µs",{"$f":"CONCATENATE(E31,LEFT(J31,2),LEFT(L31,1))","v":"00000100"},{"$f":"\"0x\"&BIN2HEX(M31,2)","v":"0x04"}]
["OTP_FS_S1_CRC_LSB",18,"R/W","0000_0000","OTP_FS_S1_CRC_LSB[7:0]"]
[null,null,null,null,"Automatically filled in by Sidence IP",null,null,null,null,null,null,null,"00000000",{"$f":"\"0x\"&BIN2HEX(M33,2)","v":"0x00"}]
["OTP_FS_S1_CRC_MSB",19,"R/W","0000_0000","OTP_FS_S1_CRC_MSB[7:0]"]
[null,null,null,null,"Automatically filled in by Sidence IP",null,null,null,null,null,null,null,"00000000",{"$f":"\"0x\"&BIN2HEX(M35,2)","v":"0x00"}]

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["Bit name",null,"Bit description","Comments"]
["VDDIOOVTH[3:0]",null,"VDDIO overvoltage threshold configuration"]
[null,{"$f":"LEFT(C3,LEN(C3)-(LEN(C3)-FIND(\"-\",C3,1))-2)","v":"0000"},"0000 - 104.5%"]
[null,"0001","0001 - 105%"]
[null,"0010","0010 - 105.5%"]
[null,"0011","0011 - 106%"]
[null,"0100","0100 - 106.5%"]
[null,"0101","0101 - 107%"]
[null,"0110","0110 - 107.5%"]
[null,"0111","0111 - 108%"]
[null,"1000","1000 - 108.5%"]
[null,"1001","1001 - 109%"]
[null,"1010","1010 - 109.5%"]
[null,"1011","1011 - 110%"]
[null,"1100","1100 - 110.5%"]
[null,"1101","1101 - 111%"]
[null,"1110","1110 - 111.5%"]
[null,"1111","1111 - 112%"]
["VCOREOVTH[3:0]",null,"VCORE (BUCK1) overvoltage threshold configuration"]
[null,"0000","0000 - 104.5%"]
[null,"0001","0001 - 105%"]
[null,"0010","0010 - 105.5%"]
[null,"0011","0011 - 106%"]
[null,"0100","0100 - 106.5%"]
[null,"0101","0101 - 107%"]
[null,"0110","0110 - 107.5%"]
[null,"0111","0111 - 108%"]
[null,"1000","1000 - 108.5%"]
[null,"1001","1001 - 109%"]
[null,"1010","1010 - 109.5%"]
[null,"1011","1011 - 110%"]
[null,"1100","1100 - 110.5%"]
[null,"1101","1101 - 111%"]
[null,"1110","1110 - 111.5%"]
[null,"1111","1111 - 112%"]
["VDDIO_V",null,"VDDIO voltage selection"]
[null,"0","0 - 3.3V"]
[null,"1","1 - 5.0V"]
["VCORE_SVS_CLAMP[4:0]",null,"SVS max value allowed (mask)"]
[null,"00000","00000 - No SVS"]
[null,"00001","00001 - 2 steps available","-12.5mV"]
[null,"00011","00011 - 4 steps available","-25mV"]
[null,"00111","00111 - 8 steps available","-50mV"]
[null,"01111","01111 - 16 steps available","-100mV"]
["VMON2OVTH[3:0]",null,"VMON2 overvoltage threshold configuration"]
[null,"0000","0000 - 104.5%"]
[null,"0001","0001 - 105%"]
[null,"0010","0010 - 105.5%"]
[null,"0011","0011 - 106%"]
[null,"0100","0100 - 106.5%"]
[null,"0101","0101 - 107%"]
[null,{"$f":"LEFT(C52,LEN(C52)-(LEN(C52)-FIND(\"-\",C52,1))-2)","v":"0110"},"0110 - 107.5%"]
[null,"0111","0111 - 108%"]
[null,"1000","1000 - 108.5%"]
[null,"1001","1001 - 109%"]
[null,"1010","1010 - 109.5%"]
[null,"1011","1011 - 110%"]
[null,"1100","1100 - 110.5%"]
[null,"1101","1101 - 111%"]
[null,"1110","1110 - 111.5%"]
[null,"1111","1111 - 112%"]
["VMON1OVTH[3:0]",null,"VMON1 overvoltage threshold configuration"]
[null,"0000","0000 - 104.5%"]
[null,"0001","0001 - 105%"]
[null,"0010","0010 - 105.5%"]
[null,"0011","0011 - 106%"]
[null,"0100","0100 - 106.5%"]
[null,"0101","0101 - 107%"]
[null,"0110","0110 - 107.5%"]
[null,"0111","0111 - 108%"]
[null,"1000","1000 - 108.5%"]
[null,"1001","1001 - 109%"]
[null,"1010","1010 - 109.5%"]
[null,"1011","1011 - 110%"]
[null,"1100","1100 - 110.5%"]
[null,"1101","1101 - 111%"]
[null,"1110","1110 - 111.5%"]
[null,"1111","1111 - 112%"]
["VMON4OVTH[3:0]",null,"VMON4 overvoltage threshold configuration"]
[null,"0000","0000 - 104.5%"]
[null,"0001","0001 - 105%"]
[null,"0010","0010 - 105.5%"]
[null,"0011","0011 - 106%"]
[null,"0100","0100 - 106.5%"]
[null,"0101","0101 - 107%"]
[null,"0110","0110 - 107.5%"]
[null,"0111","0111 - 108%"]
[null,"1000","1000 - 108.5%"]
[null,"1001","1001 - 109%"]
[null,"1010","1010 - 109.5%"]
[null,"1011","1011 - 110%"]
[null,"1100","1100 - 110.5%"]
[null,"1101","1101 - 111%"]
[null,"1110","1110 - 111.5%"]
[null,"1111","1111 - 112%"]
["VMON3OVTH[3:0]",null,"VMON3 overvoltage threshold configuration"]
[null,"0000","0000 - 104.5%"]
[null,"0001","0001 - 105%"]
[null,"0010","0010 - 105.5%"]
[null,"0011","0011 - 106%"]
[null,"0100","0100 - 106.5%"]
[null,"0101","0101 - 107%"]
[null,"0110","0110 - 107.5%"]
[null,"0111","0111 - 108%"]
[null,"1000","1000 - 108.5%"]
[null,"1001","1001 - 109%"]
[null,"1010","1010 - 109.5%"]
[null,"1011","1011 - 110%"]
[null,"1100","1100 - 110.5%"]
[null,"1101","1101 - 111%"]
[null,"1110","1110 - 111.5%"]
[null,"1111","1111 - 112%"]
["VDDIOUVTH[3:0]",null,"VDDIO undervoltage threshold configuration"]
[null,"0000","0000 - 95.5%"]
[null,"0001","0001 - 95%"]
[null,{"$f":"LEFT(C116,LEN(C116)-(LEN(C116)-FIND(\"-\",C116,1))-2)","v":"0010"},"0010 - 94.5%"]
[null,"0011","0011 - 94%"]
[null,"0100","0100 - 93.5%"]
[null,"0101","0101 - 93%"]
[null,"0110","0110 - 92.5%"]
[null,"0111","0111 - 92%"]
[null,"1000","1000 - 91.5%"]
[null,"1001","1001 - 91%"]
[null,"1010","1010 - 90.5%"]
[null,"1011","1011 - 90%"]
[null,"1100","1100 - 89.5%"]
[null,"1101","1101 - 89%"]
[null,"1110","1110 - 88.5%"]
[null,"1111","1111 - 88%"]
["VCOREUVTH[3:0]",null,"VCORE undervoltage threshold configuration"]
[null,"0000","0000 - 95.5%"]
[null,"0001","0001 - 95%"]
[null,"0010","0010 - 94.5%"]
[null,"0011","0011 - 94%"]
[null,"0100","0100 - 93.5%"]
[null,"0101","0101 - 93%"]
[null,"0110","0110 - 92.5%"]
[null,"0111","0111 - 92%"]
[null,"1000","1000 - 91.5%"]
[null,"1001","1001 - 91%"]
[null,"1010","1010 - 90.5%"]
[null,"1011","1011 - 90%"]
[null,"1100","1100 - 89.5%"]
[null,"1101","1101 - 89%"]
[null,"1110","1110 - 88.5%"]
[null,"1111","1111 - 88%"]
["VMON2UVTH[3:0]",null,"VMON2 undervoltage threshold configuration"]
[null,"0000","0000 - 95.5%"]
[null,"0001","0001 - 95%"]
[null,"0010","0010 - 94.5%"]
[null,"0011","0011 - 94%"]
[null,"0100","0100 - 93.5%"]
[null,"0101","0101 - 93%"]
[null,"0110","0110 - 92.5%"]
[null,"0111","0111 - 92%"]
[null,"1000","1000 - 91.5%"]
[null,"1001","1001 - 91%"]
[null,"1010","1010 - 90.5%"]
[null,"1011","1011 - 90%"]
[null,"1100","1100 - 89.5%"]
[null,"1101","1101 - 89%"]
[null,"1110","1110 - 88.5%"]
[null,"1111","1111 - 88%"]
["VMON1UVTH[3:0]",null,"VMON1 undervoltage threshold configuration"]
[null,"0000","0000 - 95.5%"]
[null,"0001","0001 - 95%"]
[null,"0010","0010 - 94.5%"]
[null,"0011","0011 - 94%"]
[null,"0100","0100 - 93.5%"]
[null,"0101","0101 - 93%"]
[null,"0110","0110 - 92.5%"]
[null,"0111","0111 - 92%"]
[null,"1000","1000 - 91.5%"]
[null,"1001","1001 - 91%"]
[null,"1010","1010 - 90.5%"]
[null,"1011","1011 - 90%"]
[null,"1100","1100 - 89.5%"]
[null,"1101","1101 - 89%"]
[null,"1110","1110 - 88.5%"]
[null,{"$f":"LEFT(C180,LEN(C180)-(LEN(C180)-FIND(\"-\",C180,1))-2)","v":"1111"},"1111 - 88%"]
["VMON4UVTH[3:0]",null,"VMON4 undervoltage threshold configuration"]
[null,"0000","0000 - 95.5%"]
[null,"0001","0001 - 95%"]
[null,"0010","0010 - 94.5%"]
[null,"0011","0011 - 94%"]
[null,"0100","0100 - 93.5%"]
[null,"0101","0101 - 93%"]
[null,"0110","0110 - 92.5%"]
[null,"0111","0111 - 92%"]
[null,"1000","1000 - 91.5%"]
[null,"1001","1001 - 91%"]
[null,"1010","1010 - 90.5%"]
[null,"1011","1011 - 90%"]
[null,"1100","1100 - 89.5%"]
[null,"1101","1101 - 89%"]
[null,"1110","1110 - 88.5%"]
[null,"1111","1111 - 88%"]
["VMON3UVTH[3:0]",null,"VMON3 undervoltage threshold configuration"]
[null,"0000","0000 - 95.5%"]
[null,"0001","0001 - 95%"]
[null,"0010","0010 - 94.5%"]
[null,"0011","0011 - 94%"]
[null,"0100","0100 - 93.5%"]
[null,"0101","0101 - 93%"]
[null,"0110","0110 - 92.5%"]
[null,"0111","0111 - 92%"]
[null,"1000","1000 - 91.5%"]
[null,"1001","1001 - 91%"]
[null,"1010","1010 - 90.5%"]
[null,"1011","1011 - 90%"]
[null,"1100","1100 - 89.5%"]
[null,"1101","1101 - 89%"]
[null,"1110","1110 - 88.5%"]
[null,"1111","1111 - 88%"]
["PGOOD_RSTB",null,"RSTB assignment to PGOOD","All faults asserting RSTB will also assert PGOOD, except the external Reset from MCU"]
[null,"0","0 - Not assigned"]
[null,"1","1 - Assigned"]
["PGOOD_VMON4 ",null,"VMON4 assignment to PGOOD"]
[null,"0","0 - Not assigned"]
[null,"1","1 - Assigned"]
["PGOOD_VMON3 ",null,"VMON3 assignment to PGOOD"]
[null,"0","0 - Not assigned"]
[null,"1","1 - Assigned"]
["PGOOD_VMON2 ",null,"VMON2 assignment to PGOOD"]
[null,"0","0 - Not assigned"]
[null,"1","1 - Assigned"]
["PGOOD_VMON1",null,"VMON1 assignment to PGOOD"]
[null,"0","0 - Not assigned"]
[null,"1","1 - Assigned"]
["PGOOD_VDDIO",null,"VDDIO assignment to PGOOD"]
[null,"0","0 - Not assigned"]
[null,"1","1 - Assigned"]
["PGOOD_VCORE",null,"VCORE (BUCK1) assignment to PGOOD"]
[null,"0","0 - Not assigned"]
[null,"1","1 - Assigned"]
["ABIST_VMON4",null,"VMON4 assignment to ABIST1"]
[null,"0","0 - Not assigned"]
[null,"1","1 - Assigned"]
["ABIST_VMON3",null,"VMON3 assignment to ABIST1"]
[null,"0","0 - Not assigned"]
[null,"1","1 - Assigned"]
["ABIST_VMON2",null,"VMON2 assignment to ABIST1"]
[null,"0","0 - Not assigned"]
[null,{"$f":"LEFT(C244,LEN(C244)-(LEN(C244)-FIND(\"-\",C244,1))-2)","v":"1"},"1 - Assigned"]
["ABIST_VMON1",null,"VMON1 assignment to ABIST1"]
[null,"0","0 - Not assigned"]
[null,"1","1 - Assigned"]
["ABIST_VDDIO",null,"VDDIO assignment to ABIST1"]
[null,"0","0 - Not assigned"]
[null,"1","1 - Assigned"]
["ABIST_VCORE",null,"VCORE assignment to ABIST1"]
[null,"0","0 - Not assigned"]
[null,"1","1 - Assigned"]
["WD_DIS",null,"Watchdog monitoring enable"]
[null,"0","0 - Enabled"]
[null,"1","1 - Disabled","FS0B cannot be released when WD is disabled by OTP. Recommend to use Debug mode.\nValid_WD=0, so the device will go to STANDBY when WAKE1=WAKE2=0"]
["WD_SELECTION",null,"Watchdog mode selection"]
[null,{"$f":"LEFT(C258,LEN(C258)-(LEN(C258)-FIND(\"-\",C258,1))-2)","v":"0"},"0 - Simple WD"]
[null,1,"1 - Challenger WD"]
["FCCU_EN",null,"FCCU monitoring enable"]
[null,"0","0 - Disabled"]
[null,"1","1 - Enabled"]
["VMON4",null,"VMON4 monitoring enable"]
[null,"0","0 - Disabled"]
[null,"1","1 - Enabled"]
["VMON3",null,"VMON3 monitoring enable"]
[null,"0","0 - Disabled"]
[null,"1","1 - Enabled"]
["VMON2",null,"VMON2 monitoring enable"]
[null,"0","0 - Disabled"]
[null,"1","1 - Enabled"]
["VMON1",null,"VMON1 monitoring enable"]
[null,"0","0 - Disabled"]
[null,"1","1 - Enabled"]
["FLT_RECOVERY_EN",null,"Fault recovery strategy enable","To be used with NXP 16nm S32 MCU"]
[null,"0","0 - Disabled"]
[null,"1","1 - Enabled"]
["VCORE_UV_DGLT[1:0]",null,"VCORE undervoltage filtering time"]
[null,"00","00 - 5µs"]
[null,"01","01 - 15µs"]
[null,"10","10 - 25µs"]
[null,"11","11 - 40µs"]
["VCORE_OV_DGLT",null,"VCORE overvoltage filtering time"]
[null,"0","0 - 25µs"]
[null,"1","1 - 45µs"]
["VDDIO_UV_DGLT[1:0]",null,"VDDIO undervoltage filtering time"]
[null,"00","00 - 5µs"]
[null,{"$f":"LEFT(C288,LEN(C288)-(LEN(C288)-FIND(\"-\",C288,1))-2)","v":"01"},"01 - 15µs"]
[null,"10","10 - 25µs"]
[null,"11","11 - 40µs"]
["VDDIO_OV_DGLT",null,"VDDIO overvoltage filtering time"]
[null,"0","0 - 25µs"]
[null,"1","1 - 45µs"]
["VMONx_UV_DGLT[1:0]",null,"VMONx undervoltage filtering time","Valid for all VMON1,2,3,4"]
[null,"00","00 - 5µs"]
[null,"01","01 - 15µs"]
[null,"10","10 - 25µs"]
[null,"11","11 - 40µs"]
["VMONx_OV_DGLT",null,"VMONx overvoltage filtering time","Valid for all VMON1,2,3,4"]
[null,"0","0 - 25µs"]
[null,"1","1 - 45µs"]

{"sheet":"FS84_VPRE_VBOOST_Components","index":9,"n_rows":52,"n_cols":16,"rows_kept":52,"cut":false,"hidden":false,"merged":[[16,1,16,3],[16,5,16,7],[16,9,16,11],[3,15,3,23],[5,1,5,3],[5,5,5,7],[5,9,5,11],[3,1,3,3],[3,5,3,7],[3,9,3,11],[1,1,1,3],[1,5,1,7],[1,9,1,11],[2,1,2,3],[2,5,2,7],[2,9,2,11]]}
[]
[null,"Inputs",null,null,null,"Inputs",null,null,null,"Inputs"]
[null,"Outputs",null,null,null,"Outputs",null,null,null,"Outputs"]
[null,"Normalized values",null,null,null,"Normalized values",null,null,null,"Normalized values",null,null,null,null,null,"Current mode regulation loop principle"]
[]
[null,"PI Filter",null,null,null,"PI Filter"]
[null,"Fpi = Fsw / 10",{"$f":"1000*C21/10","v":45500},"Hz",null,"Fpi = Fsw / 10",{"$f":"1000000*G21/10","v":222000},"Hz"]
[null,"Lpi",1,"uH",null,"Lpi",0.1,"uH"]
[null,"Cpi1_Vbat_Calculated",{"$f":"1000000/(2*2*3.14156*3.14156*C7*C7*C8/1000000)","v":12.235634576974752},"uF",null,"Cpi1_Vbat_Calculated",{"$f":"1000000/(2*2*3.14156*3.14156*G7*G7*G8/1000000)","v":5.1397659449277606},"uF"]
[null,"Cpi1_Vbat_Selected",10,"uF",null,"Cpi1_Vbat_Selected",2.2000000000000002,"uF"]
[null,"Cpi2_Vsup_Selected",20,"uF",null,"Cpi2_Vsup_Selected",20,"uF"]
[null,"Cpi2_Vripple_Calculated",{"$f":"C22*C20*(1-C20)/(C11/1000000*C7)","v":1.1619107915404212},"V",null,"Cpi2_Vripple_Calculated",{"$f":"G22*G20*(1-G20)/(G11/1000000*G7)","v":0.14288362436510582},"V"]
[null,"Fc_cutoff_frequency_Cpi2_Lpi_Calculated",{"$f":"1000/(2*PI()*SQRT(C8*C11))","v":35.588127170858854},"kHz",null,"Fc_cutoff_frequency_Cpi2_Lpi_Calculated",{"$f":"1000/(2*PI()*SQRT(G8*G11))","v":112.53953951963827},"kHz"]
[null,"Zin_PRE_Calculated (Eff=1)",{"$f":"C18^2/(C19*C22)","v":8.8902439024390247},"Ω",null,"Zin_PRE_Calculated (Eff=1)",{"$f":"G18^2/(G19*G22)","v":14.817073170731708},"Ω"]
[null,"Zout_PI_filter_Calculated (Eff=1)",{"$f":"SQRT(C8/C11)","v":0.22360679774997896},"Ω",null,"Zout_PI_filter_Calculated (Eff=1)",{"$f":"SQRT(G8/G11)","v":7.0710678118654752E-2},"Ω"]
[]
[null,"VPRE - 455KHz",null,null,null,"VPRE - 2.22MHz",null,null,null,"BOOST - 2.22MHz"]
[null,"Vin (VSUP)",13.5,"V",null,"Vin (VSUP)",13.5,"V",null,"Vin (VPRE)",{"$f":"C19","v":4.0999999999999996},"V"]
[null,"Vout (3.3 or 4.1 or 5.0V)",4.0999999999999996,"V",null,"Vout (3.3 or 4.1 or 5.0V)",{"$f":"C19","v":4.0999999999999996},"V",null,"Vout","5.0","V"]
[null,"Duty Cycle (Eff=1)",{"$f":"C19/C18","v":0.3037037037037037},null,null,"Duty Cycle (Eff=1)",{"$f":"G19/G18","v":0.3037037037037037},null,null,"Vd (diode foward voltage)",0.4,"V"]
[null,"Fsw (455KHz or 2.22MHz)",455,"Hz",null,"Fsw (455KHz or 2.22MHz)",2.2200000000000002,"MHz",null,"Duty Cycle (Eff=1)",{"$f":"1-(K18/(K19+K20))","v":0.24074074074074081}]
[null,"I_PRE_average",5,"A",null,"I_PRE_average",3,"A",null,"Fsw",2.2200000000000002,"MHz"]
[null,"I_PRE_peak (in the inductor)",{"$f":"C22+(C22*C30/2/100)","v":5.6674806674806675},"A",null,"I_PRE_peak (in the inductor)",{"$f":"G22+(G22*G30/2/100)","v":3.2922619589286253},"A",null,"I_BOOST",1,"A"]
[null,"Inductor Current Ripple desired",30,"%",null,"Inductor Current Ripple desired",30,"%",null,"Ilim min",{"$f":"(1+K25/2/100)*K23/(1-K21)","v":1.4158536585365855},"A"]
[null,"Output Voltage Ripple desired",20,"mV",null,"Output Voltage Ripple desired",20,"mV",null,"Inductor Current Ripple desired",15,"%"]
[null,"Max load transient dV (under/over voltage)",100,"mV",null,"Max load transient dV (under/over voltage)",100,"mV",null,"Output Voltage Ripple desired",20,"mV"]
[null,"Max load transient dI requirement",1.5,"A",null,"Max load transient dI requirement",1.5,"A",null,"Max load transient dV (under/over voltage)",250,"mV"]
[null,"L_PRE_calculated",{"$f":"1000*((C19*(C18-C19))/(C24/100*C18*C22*C21))","v":4.1828788495455163},"uH",null,"L_PRE_calculated",{"$f":"((G19*(G18-G19))/(G24/100*G18*G22*G21))","v":1.4288362436510584},"uH",null,"Max load transient dI requirement",0.4,"A"]
[null,"L_PRE_selected from\n(4.7uH - 10uH @450KHz)",4.7,"uH",null,"L_PRE_selected from\n(1.5uH - 4.7uH @2.22MHz)",2.2000000000000002,"uH",null,"L_BOOST",{"$f":"(K18*K18*(K19-K18))/(K25/100*K19*K19*K23*K22)","v":1.8172972972972976},"uH"]
[null,"Inductor Current Ripple Calculated",{"$f":"100*(C19*(C18-C19))/(C29/1000*C18*C22*C21)","v":26.699226699226696},"%",null,"Inductor Current Ripple Calculated",{"$f":"100*(G19*(G18-G19))/(G29*G18*G22*G21)","v":19.484130595241702},"%",null,"L_BOOST_selected from\n(2.2uH - 6.8uH @2.22MHz)",2.2000000000000002,"uH"]
[null,"Cout_PRE_min (for ripple)",{"$f":"1000*(C22*C24/100)/(C25/1000*8*C21)","v":20.604395604395606},"uF",null,"Cout_PRE_min (for ripple)",{"$f":"(G22*G24/100)/(G25/1000*8*G21)","v":2.5337837837837838},"uF",null,"Inductor Current Ripple Calculated",{"$f":"100*(K18*K18*(K19-K18))/(K30*K19*K19*K23*K22)","v":12.390663390663395},"%"]
[null,"Cout_PRE_min (for transient)\nCout = dI / (2π x Fbw x dV)",{"$f":"1000000*C27/(2*PI()*C38*C26)","v":52.468662557767701},"uF",null,"Cout_PRE_min (for transient)\nCout = dI / (2π x Fbw x dV)",{"$f":"1000000*G27/(2*PI()*G38*G26)","v":16.130568556611014},"uF",null,"C_BOOST_min (for ripple)",{"$f":"((1-K18/K19)*K23)/(K22*K26/1000)","v":4.0540540540540544},"uF"]
[null,"Cout_PRE_selected",88,"uF",null,"Cout_PRE_selected",22,"uF",null,"Cout_BOOST_min (for transient)\nCout = DI / (2π x Fbw x DV)",{"$f":"1000000*K28/(2*3.14156*12000*K27/1000)","v":21.220879647903164},"uF"]
[null,"Max dV Calculated",{"$f":"1000*C27/(2*3.14156*C33/1000*C38)","v":59.624099909817829},"mV",null,"Max dV Calculated",{"$f":"1000*G27/(2*3.14156*G33*G38)","v":7.3321528267478675E-2},"mV",null,"Cout_BOOST_selected",22,"uF"]
[null,"Cout_PRE_ESR",10,"mΩ",null,"Cout_PRE_ESR",20,"mΩ",null,"Max load transient DV Calculated",{"$f":"1000*K28/(2*3.14156*K34/1000000*1000*K41)","v":131.65202411714037},"mV"]
[null,"Output Voltage Ripple Calculated",{"$f":"((C22*C30/100)/(C33/1000000*8*C21)+(C35/1000*C22*C30/100))","v":4.1809361985186158},"mV",null,"Output Voltage Ripple Calculated",{"$f":"1000*((G22*G30/100)/(G33*8*G21)+(G35/1000*G22*G30/100))","v":13.186495755428318},"mV",null,"Voltage/Current Ratio (Kcs)\nKcs = 0.466/ILIM",{"$f":"0.466/K24","v":0.32913006029285097},"V/A"]
[null,"Rsense (10 - 20)",20,"mΩ",null,"Rsense (10 - 20)",10,"mΩ",null,"Bandwidth (Fbw ~12KHz)",12,"kHz"]
[null,"Bandwidth target (Fbw ~Fsw/10)",{"$f":"C21/10","v":45.5},"kHz",null,"Bandwidth target (Fbw ~Fsw/15)",{"$f":"1000*G21/15","v":148},"kHz",null,"Fz = 1/(2π x Rcomp x Ccomp)",{"$f":"1/(2*3.14156*K43*K44/1000000)","v":1.6976703718322532},"kHz"]
[null,"Fz = Fbw/10 = 1/(2π x Rcomp x Ccomp)",{"$f":"C38/10","v":4.55},"kHz",null,"Fz = Fbw/10 = 1/(2π x Rcomp x Ccomp)",{"$f":"G38/10","v":14.8},"kHz",null,"Fp = 1/(2π x Rcomp x Chf)",{"$f":"1/(2*3.14156*K43*K45/1000000)","v":106.10439823951583},"kHz"]
[null,"Fp = Fsw/2 = 1/(2π x Rcomp x Chf)",{"$f":"C21/2","v":227.5},"kHz",null,"Fp = Fsw/4 = 1/(2π x Rcomp x Chf)",{"$f":"1000*G21/4","v":555},"kHz",null,"EA transconductance (gmEA_BOOST)",7,"uS"]
[null,"EA transconductance (gmEA_PRE)",1.5,"mS",null,"EA transconductance (gmEA_PRE)",1.5,"mS",null,"Fgbw = 1/(Kcs x 2π x Cout)",{"$f":"1/(2*3.14156*K34/1000*K36)","v":21.980340484916304},"kHz"]
[null,"Fgbw = 1/(Rsense x Acs x 2π x Cout)",{"$f":"1/(C37/1000*5*2*3.14156*C33/1000)","v":18.08597697264474},"kHz",null,"Fgbw = 1/(Rsense x Acs x 2π x Cout)",{"$f":"1/(G37/1000*5*2*3.14156*G33/1000)","v":144.68781578115792},"kHz",null,"EA gain = (Vref/Vout) x gmEA x Rcomp",{"$f":"K37/K41","v":0.54594240740878552}]
[null,"EA gain = (Vref/Vout) x gmEA x Rcomp",{"$f":"10^LOG10(C38/C42)","v":2.5157612480000004},null,null,"EA gain = (Vref/Vout) x gmEA x Rcomp",{"$f":"10^LOG10(G38/G42)","v":1.0228919360000002},null,null,"Rcomp_selected from OTP",750,"KΩ"]
[null,"Rcomp_Calculated",{"$f":"C19*C43/C41","v":6.8764140778666674},"KΩ",null,"Rcomp_Calculated",{"$f":"G19*G43/G41","v":2.795904625066667},"KΩ",null,"Ccomp_selected from OTP",125,"pF"]
[null,"Rcomp_selected",6.81,"KΩ",null,"Rcomp_selected",4.3,"KΩ",null,"Chf_integrated (fixed)",2,"pF"]
[null,"Ccomp_calculated (min)",{"$f":"1000000/(2*3.14156*C45*1000*C39)","v":5.1364863358433377},"nF",null,"Ccomp_calculated (min)",{"$f":"1000000/(2*3.14156*G45*1000*G39)","v":2.5008893362550868},"nF",null,"Discharge slope m=(Vout+Vd-Vin)/L",{"$f":"1000*(K19+0.6-K18)/K30","v":681.81818181818176},"mA/us"]
[null,"Ccomp_selected",4.7,"nF",null,"Ccomp_selected",2.7,"nF",null,"Slope compensation to select \nSC > m x Kcs",{"$f":"K46*K36","v":224.40685929058017},"mV/us"]
[null,"Chf_calculated",{"$f":"1000000000/(2*3.14156*C45*1000*C40)","v":102.72972671686675},"pF",null,"Chf_calculated",{"$f":"1000000000/(2*3.14156*G45*1000*G40)","v":66.690382300135653},"pF"]
[null,"Chf_selected",100,"pF",null,"Chf_selected",68,"pF"]
[null,"Discharge slope m=(Vout/L)",{"$f":"1000*C19/C29","v":872.34042553191489},"mA/us",null,"Discharge slope m=(Vout/L)",{"$f":"1000*G19/G29","v":1863.6363636363635},"mA/us"]
[null,"Slope compensation to select \nSC > m x Rsense x Acs",{"$f":"C50*C37/1000*5","v":87.2340425531915},"mV/us",null,"Slope compensation to select \nSC > m x Rsense x Acs",{"$f":"G50*G37/1000*5","v":93.181818181818187},"mV/us"]
[null,"Current Limit to select must be >",{"$f":"C37*C23","v":113.34961334961335},"mV",null,"Current Limit to select must be >",{"$f":"G37*G23","v":32.922619589286256},"mV"]

{"sheet":"Normalized_R_C_Values","index":10,"n_rows":74,"n_cols":15,"rows_kept":74,"cut":false,"hidden":false,"merged":[[1,1,1,12],[1,14,1,24],[10,1,17,1],[10,2,13,2],[10,3,11,3],[10,5,17,5],[10,6,13,6],[10,7,11,7],[10,9,17,9],[10,10,13,10],[10,11,11,11],[12,3,13,3],[12,7,13,7],[12,11,13,11],[14,2,17,2],[14,3,15,3],[14,6,17,6],[14,7,15,7],[14,10,17,10],[14,11,15,11],[16,3,17,3],[16,7,17,7],[16,11,17,11],[18,1,25,1],[18,2,21,2],[18,3,19,3],[18,5,25,5],[18,6,21,6],[18,7,19,7],[18,9,25,9],[18,10,21,10],[18,11,19,11],[20,3,21,3],[20,7,21,7],[20,11,21,11],[22,2,25,2],[22,3,23,3],[22,6,25,6],[22,7,23,7],[22,10,25,10],[22,11,23,11],[24,3,25,3],[24,7,25,7],[24,11,25,11],[26,1,33,1],[26,2,29,2],[26,3,27,3],[26,5,33,5],[26,6,29,6],[26,7,27,7],[34,6,37,6],[34,7,35,7],[38,2,41,2],[30,2,33,2],[30,3,31,3],[30,6,33,6],[30,7,31,7],[30,10,33,10],[30,11,31,11],[32,3,33,3],[32,7,33,7],[32,11,33,11],[26,9,33,9],[26,10,29,10],[26,11,27,11],[28,3,29,3],[28,7,29,7],[28,11,29,11],[38,11,39,11],[40,3,41,3],[40,7,41,7],[40,11,41,11],[42,1,49,1],[42,2,45,2],[42,3,43,3],[42,5,49,5],[42,6,45,6],[42,7,43,7],[34,9,41,9],[34,10,37,10],[34,11,35,11],[36,3,37,3],[36,7,37,7],[36,11,37,11],[38,3,39,3],[38,6,41,6],[38,7,39,7],[38,10,41,10],[34,1,41,1],[34,2,37,2],[34,3,35,3],[34,5,41,5],[46,2,49,2],[46,3,47,3],[46,6,49,6],[46,7,47,7],[46,10,49,10],[46,11,47,11],[48,3,49,3],[48,7,49,7],[48,11,49,11],[42,9,49,9],[42,10,45,10],[42,11,43,11],[44,3,45,3],[44,7,45,7],[44,11,45,11],[54,2,57,2],[54,11,55,11],[56,3,57,3],[56,7,57,7],[56,11,57,11],[50,9,57,9],[50,10,53,10],[50,11,51,11],[52,3,53,3],[52,7,53,7],[52,11,53,11],[54,3,55,3],[54,6,57,6],[54,7,55,7],[54,10,57,10],[70,3,71,3],[70,6,73,6],[70,7,71,7],[70,10,73,10],[64,11,65,11],[58,9,65,9],[58,10,61,10],[58,11,59,11],[60,3,61,3],[60,7,61,7],[60,11,61,11],[70,11,71,11],[72,11,73,11],[66,9,73,9],[66,10,69,10],[62,10,65,10],[66,3,67,3],[66,5,73,5],[66,6,69,6],[66,7,67,7],[62,3,63,3],[62,6,65,6],[62,7,63,7],[72,3,73,3],[62,11,63,11],[64,3,65,3],[64,7,65,7],[50,1,57,1],[50,2,53,2],[50,3,51,3],[50,5,57,5],[66,11,67,11],[68,3,69,3],[68,7,69,7],[68,11,69,11],[66,1,73,1],[66,2,69,2],[70,2,73,2],[62,2,65,2],[72,7,73,7],[58,1,65,1],[58,2,61,2],[58,3,59,3],[58,5,65,5],[58,6,61,6],[58,7,59,7],[50,6,53,6],[50,7,51,7]]}
[]
[null,"Resistors",null,null,null,null,null,null,null,null,null,null,null,null,"Capacitors"]
[]
[null,"E12   10% tolerance"]
[null,"E24     5% tolerance"]
[null,"E48     2% tolerance"]
[null,"E96     1% tolerance"]
[null,"E192   0.5, 0.25, 0.1% and higher tolerances"]
[]
[null,"E24","E48","E96","E192","E24","E48","E96","E192","E24","E48","E96","E192"]
[null,100,100,100,100,220,215,215,215,470,464,464,464]
[null,null,null,null,101,null,null,null,218,null,null,null,470]
[null,null,null,102,102,null,null,221,221,null,null,475,475]
[null,null,null,null,104,null,null,null,223,null,null,null,481]
[null,null,105,105,105,null,226,226,226,null,487,487,487]
[null,null,null,null,106,null,null,null,229,null,null,null,493]
[null,null,null,107,107,null,null,232,232,null,null,499,499]
[null,null,null,null,109,null,null,null,234,null,null,null,505]
[null,110,110,110,110,240,237,237,237,510,511,511,511]
[null,null,null,null,111,null,null,null,240,null,null,null,517]
[null,null,null,113,113,null,null,243,243,null,null,523,523]
[null,null,null,null,114,null,null,null,246,null,null,null,530]
[null,null,115,115,115,null,249,249,249,null,536,536,536]
[null,null,null,null,117,null,null,null,252,null,null,null,542]
[null,null,null,118,118,null,null,255,255,null,null,549,549]
[null,null,null,null,120,null,null,null,258,null,null,null,556]
[null,120,121,121,121,270,261,261,261,560,562,562,562]
[null,null,null,null,123,null,null,null,264,null,null,null,569]
[null,null,null,124,124,null,null,267,267,null,null,576,576]
[null,null,null,null,126,null,null,null,271,null,null,null,583]
[null,null,127,127,127,null,274,274,274,null,590,590,590]
[null,null,null,null,129,null,null,null,277,null,null,null,597]
[null,null,null,130,130,null,null,280,280,null,null,604,604]
[null,null,null,null,132,null,null,null,284,null,null,null,612]
[null,130,133,133,133,300,287,287,287,620,619,619,619]
[null,null,null,null,135,null,null,null,291,null,null,null,626]
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